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EDA/IP  

IC floorplanning moves ahead with Patoma

Posted: 16 Mar 2005  Print Version  Bookmark and Share Subscribe

Keywords: ic floorplanning  design  wire length  placement  prototyping 

[Summary of tips] BROKEN_TABLE_ HIDDEN_END -->A new approach to IC floorplanning is said to reduce wire length while running orders of magnitude faster than previous solutions. If it can be applied successfully on a commercial level, the Patoma algorithm developed at UCLA could help usher in a new generation of IC design-planning and placement ......
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