FPGAs/PLDs 
SPI-4.2 to quad SPI-3 bridge
Keywords: xilinx
[Summary of tips] This app note describes a reference design used to bridge one 4-channel Xilinx SPI-4.2(PL4) core (v6.1) to four 1-channel SPI-3 (PL3) link layer cores (v3.2).View the PDF document for more information.|
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