Global Sources
EE Times-Asia
 Challenges & Opportunities 2011   MCU   MEMS   IGBT   processor   LED   RFID
EE Times-Asia > FPGAs/PLDs
 
 
FPGAs/PLDs  

Design optimization using Warp synthesis directives

Posted: 30 Mar 2001  Print Version  Bookmark and Share Subscribe

Keywords: cypress  warp  warp synthesis directive  synthesis directive  pld design tool 

[Summary of tips] This application note introduces synthesis directives and shows the tradeoffs that can be made to gain the best possible densities and speeds for VHDL or schematic implementations. It discusses various Warp synthesis directives, their formats and the purpose of each directive.View the PDF document for more information.
 

Article Comments - Design optimization using Warp synth...
Comments:  
*  You can enter [0] more charecters.
*Verify code:
 
Christmas Wishlist
Peek at Hot Gadgets for 2012
Smart energy "Try explaining to your eight-year-old son that instead of an Xbox, you got him a Wi-Fi enabled smart energy thermostat to help minimize his energy consumption and carbon footprint..."
 

Go to top