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FPGAs/PLDs  

Symmetrical 24-tap FIR filter Macro (FIR24S)

Posted: 06 Sep 2000  Print Version  Bookmark and Share Subscribe

Keywords: atmel  fpga  pga  programmable logic  logic ic 

[Summary of tips] This application note details the implementation of a symmetrical 24-tap FIR filter Macro in the AT6000 Series FPGAs.View the PDF document for more information.
 

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