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Manufacturing/Packaging  

Formal verification by equivalence checking in deep sub-micron designs

Posted: 01 Sep 2000  Print Version  Bookmark and Share Subscribe

Keywords: mentor graphics  formal verification  equivalence checking  design for test  dft 

[Summary of tips] Equivalence verification tools compare the logical behavior of two circuits while ensuring a consistent design flow. They aim to combine structural checking with handling of multi-million gate designs in a small memory footprint.View the PDF document for more information.
 

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