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Conserving power with auto power down mode in SpartanXL FPGAs

Posted: 21 Jun 2000  Print Version  Bookmark and Share Subscribe

Keywords: xilinx  spartanxl  fpga  pga  gate array 

[Summary of tips] This application note shows how to reduce power consumption by selectively disabling portions, which are not required all the time, in designing the SpartanXL FPGAs.View the PDF document for more information.
 

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