| 2008-08-27 |
Cadence tool steps up IC package, SiP designs |
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The release of SPB 16.2, due in November of this year, from Cadence Design Systems, delivers advanced IC package/system-in-package miniaturization, design cycle reduction and DFM-driven design, along with a new power integrity modeling solution |
| 2008-08-22 |
Green trends heat up for next designs |
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Gone are the days when design was, well, design. Today it's DFM, design-for-quality, design-for-cost and DfE |
| 2008-05-27 |
Assessing the DFM impact |
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The EDA industry, always looking for timely solutions to the existing problems of the electronics market, has taken the challenge of defining a new market segment. |
| 2008-05-01 |
Sign-off smartly with SSTA |
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At the 45nm process node, the SSTA approach to sign-off will allow designers to mitigate the effects of process variation, prevent silicon failures, and meet the demands of cutting-edge electronic design for the near future. It will usher in the much-anticipated "electrical DFM" that provides multi-objective placement, physical synthesis, and routing optimization while comprehending the full spectrum of physical and electrical implications of manufacturing |
| 2008-03-18 |
Synopsys, SMIC tip 90nm reference design flow |
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Synopsys Inc. and SMIC have released an enhanced 90nm hierarchical, multivoltage RTL-to-GDSII reference design flow that benefits from advanced synthesis, design-for-test and DFM capabilities |
| 2008-03-17 |
Succeed at 65nm design |
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A true DFM-aware environment accounts for process variability and lithographic effects in the context of timing, power, noise and yield at every stage of the flow. This begins with the characterization of the cell library, continues through implementation, analysis and optimization, and ends with sign-off verification |
| 2008-03-17 |
Bring DFM/DFY into the routing engine |
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In reality, DFM/DFY tools need to use a mixture of rules- and model-based techniques as appropriate. The solution is to bring DFM/DFY upstream into the design process; to create a design that is correct by construction; and to hand-off a design that is as manufacturing- and yield-friendly as possible |
| 2008-01-02 |
Expanding the DFM market |
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Apache's acquisition of Optimal is another clear signal that the EDA industry is adapting to provide designers with tools that allow them to work on the entire system, not just parts that have different physical characteristics. |
| 2007-09-24 |
Magma, UMC deliver verification, DFM tools for 65nm |
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Magma Design Automation Inc. has partnered with UMC to deliver a broad physical verification and design for manufacturability solution for 65nm designs. |
| 2007-09-21 |
Firms join forces to advance DFM |
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The Silicon Integration Initiative (Si2) announced that top chip makers and EDA tool vendors have established a design-for-manufacturing (DFM) coalition intended to build on previous DFM efforts |
| 2007-08-21 |
Cadence acquires DFM firm Clear Shape |
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Cadence Design has acquired Clear Shape Technologies, a design for manufacturing technology firm specializing in design-side solutions to minimize yield loss for advanced semiconductor ICs. |
| 2007-08-01 |
Follow a balanced DFx flow |
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The best DFx flow available today combines the DFM-aware features in today's synthesis, placement and routing solutions with a post-route (pre-GDS) interconnect optimization step |
| 2007-07-12 |
Cadence, STARC team to address 65nm DFM issues |
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Cadence and STARC have partnered to deliver an advanced design flow to address 65nm DFM issues |
| 2007-07-02 |
Manage design data effectively |
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Today's DFM process for electronic products typically includes a disparate range of disciplines. Hence, the task of coordinating the flow of information can be daunting. Here are some tips to implement effective data management |
| 2007-06-25 |
Intel drafts inverse litho to cover EUV delay |
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With the possible delay of its EUV lithography, Intel disclosed it is developing a DFM technology that could extend optical scanners to the 22nm node |
| 2007-06-18 |
Industry tackles approach to DFM, DFY issues |
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Experts from chip, EDA and foundry companies ask whether it's better to deal with DFM and DFY issues at tape-out or minister to the design starting at the register transfer level |
| 2007-06-01 |
IC designers favor less complex DFM |
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During the IEEE Electronic Design Process workshop, IC design experts point out that current approaches to design-for-manufacturing (DFM) may be yielding too little for the amount of effort and cost involved |
| 2007-05-25 |
Fujitsu taps Mentor to improve DFM capabilities |
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Mentor Graphics announced that Fujitsu will use Mentor's Calibre LFD to enhance their DFM capabilities for internal product development and for external fabless customers |
| 2007-05-18 |
Cadence buys DFM startup from U.C. Berkeley |
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Cadence Design Systems has confirmed its purchase of a design for manufacturability (DFM) startup founded by three graduate students from the University of California at Berkeley |
| 2007-03-16 |
Electrical DFM promises gains in parametric yield |
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Design techniques are under greater pressure to provide equivalent scaling to enable the semiconductor road map to continue in a cost-effective way. |
| 2007-03-16 |
DFM demands holistic approach |
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The infrastructure required to make trade-offs among the different techniques and determine the optimal approach should be one where the actual software takes into account the implications of other DFM issues. The idea is to create a holistic approach to DFM for the design and analysis flow |
| 2007-03-05 |
Integrated DFM solutions still lacking |
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According to a Charted Semi exec, EDA has done a great job of raising awareness of DFM issues, but integrated DFM solutions remain scarce |
| 2007-01-26 |
STARC to use Mentor's analyzer tool for DFM flow |
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Semiconductor Technology Academic Research Center will standardize on Mentor Graphics' Calibre YieldAnalyzer for critical area analysis in their DFM flow |
| 2007-01-19 |
Clear Shape, STARC to develop DFM flow |
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Clear Shape Technologies Inc. announced a partnership with STARC to jointly develop, validate and deploy a variability-aware DFM flow |
| 2006-12-13 |
Synthesis tool meets complex CMP design rules |
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The new synthesis tool from Blaze DFM Inc. inserts dummy fill patterns into a design layout and is said to optimally meet complex CMP design rules without requiring complicated scripts |
| 2006-12-04 |
Clear Shape offers electrical DFM analysis solution |
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Clear Shape Technologies has announced OutPerform, said to be the first complete and silicon-correlated electrical DFM analysis and optimization product to enable designers using sub-90nm processes to control the impact of lithography, mask, etch, RET, OPC and CMP effects on their chip parameters |
| 2006-11-28 |
Clear Shape solution promises fast DFM hotspot detection |
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Clear Shape Technologies has announced InShape, said to be the first model-based full-chip Design Manufacturability Checker that predicts accurate silicon shapes, providing designers the ability to do fast, accurate DFM hotspot detection of catastrophic failures |
| 2006-11-16 |
Valor eases design with collaborative tool |
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vShare will provide a centralized, scalable platform with secure access to DFM-related design information, including design reviews, design changes and manufacturing sign-off |
| 2006-11-16 |
...DFM too complex,' experts say |
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Speakers told the Bacus Photomask Technology Symposium that DFM technology is too complex and suggested the use of standardized layout elements, library cells or an "integrated" DFM methodology |
| 2006-10-31 |
Synopsys unveils DFM tools for 45nm, beyond |
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Synopsys has unveiled a new family of process-aware DFM products that analyze variability effects at the custom/analog design stage for 45nm and smaller designs |
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| 2006-10-18 |
IC design tool touts process-aware DFM |
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Synopsys two "process-aware" tools that help custom- and analog-IC designers analyze the impact of transistor variability on circuit layouts. |
| 2006-10-04 |
Industry players meet to discuss standard for Open DFM |
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Participants of the Open DFM Model Workshop last week explored issues ranging from DFM flows to encryption and identified possible next steps |
| 2006-09-22 |
Synopsys, Nikon co-develop 45nm solutions |
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Synopsys and Nikon have tied up to develop and deliver advanced lithography software models and DFM-enabled lithography manufacturing solutions for 45nm and below |
| 2006-09-21 |
DFM tool implements yield improvement at design stage |
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Nannor said its upgraded Acuma tool reduces semiconductor design iterations and manufacturing costs by revealing yield-sensitive areas of the design and implementing yield improvement at the design stage. |
| 2006-09-18 |
New DFM methods enable early yield prediction |
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New DFM methodologies such as RRA and CAA, combined with traditional DRC and accurate fab yield impact data, enable designers to determine whether design modifications actually result in higher-yielding silicon |
| 2006-09-01 |
EDA app shows variants of IC design |
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DFM tool provider Aprio Technologies Inc. has developed an application extension, Halo-Quest, designed to fit on top of EDA design and analysis tools, and to generate accurate silicon image representation of IC designs for use within design flows |
| 2006-09-01 |
Restricted design rules challenge DFM |
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The recent Design Automation Conference made it clear that the EDA industry is counting on DFM for a much-needed boost. But the RDRs that are quietly emerging for 45nm and smaller geometries may reduce the need for some DFM tools and techniques, some observers say |
| 2006-08-21 |
Synopsys broadens DFM portfolio with SIGMA-C acquisition |
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Synopsys Inc. announced that it has completed the acquisition of SIGMA-C Software AG in an all-cash transaction of $20.5 million. |
| 2006-07-26 |
TSMC adds support for Blaze DFM optimization software |
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Taiwan Semiconductor Manufacturing Co. Ltd is adding support for Blaze MO optimization software from Blaze DFM Inc. with both companies supplying evaluation kits |
| 2006-07-18 |
Magma all set for DAC, preps for EDA&T |
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Magma said capabilities of its new Talus IC implementation system, methods for minimizing power consumption, and DFM capabilities integrated in the design flow will be among the technology it will demonstrate at next week's DAC |
| 2006-07-11 |
Aprio, Pyxis collaborate on lithography-aware DFM router |
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Aprio and Pyxis announced the integration of Aprio's Halo-Quest and associated DFM View into the DFM-routing technology from Pyxis |
| 2006-07-01 |
DFM tool targets parametric yield |
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Blaze DFM Inc. recently rolled out Blaze MO, said to be the first "electrical" DFM solution |
| 2006-05-19 |
Cadence tech supports TSMC's 65nm design |
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Cadence Design Systems announced that its device and interconnect models, design flows and DFM technologies support TSMC 65nm technology |
| 2006-05-03 |
Cadence, PDF Solutions to collaborate on IC DFM products |
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Cadence Design Systems Inc. and PDF Solutions Inc. announced their intent to collaborate on Design-for-Manufacturability technology and products to improve IC manufacturability. |
| 2006-05-01 |
Synopsys adding to its DFM lineup |
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Included in Synopsys' yearend agenda is the addition of a dual-domain simulation product and a next-generation yield analysis tool to its DFM product family |
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