- Spread-spectrum clocking reception for displays

- Video connectivity using TMDS I/O in Spartan-3A FPGAs

- Eliminating I/O coupling effects when interfacing large-swing single-ended signals to user I/O Pins on Spartan-3 Generation FPGAs

- Custom PCI timing budgets for Spartan-3 Generation FPGAs

- XtremeDSP DSP48A for Spartan-3A DSP FPGAs User Guide

- Extended Spartan-3A family overview

- Using external data memory with PIC24F/24H/dsPIC33F devices

- MirrorBit write buffer programming and page buffers

- Calculating wait states for initial and subsequent access times Revision 0.5

- Using 1.8 V S29WS256N on 3.3 V Systems

- Understanding AC characteristics

- Using C and I/O pins to interface 8051 MCUs with I˛C serial EEPROMs

- Developing system-level validation routines

- Spansion advanced sector protection

- Solder mask and trace recommendations for FBGAs

- Using a timer to interface 8051 MCUs with UNI/O bus-compatible serial EEPROMs

- Wind River Probe

- Wind River Workbench 3.0

- Wind River Workbench, On-Chip Debugging Edition

- VxWorks 6.6 SMP

- Wind River Linux 2.0

- Wind River ICE

- Partial page programming MirrorBit ORNAND with NAND Interface

- Reset voltage and timing requirements for MirrorBit Flash

- KGD Assembly

- V850 LVI/POC

- Wind River platform for network equipment, VxWorks Edition 3.6

- Wind River platform for industrial devices, VxWorks Edition 3.6

- Wind River platform for consumer devices, VxWorks Edition 3.6

- Wind River platform for automotive devices, VxWorks Edition 3.6

- Wind River General Purpose Platform, VxWorks Edition 3.6

- Wind River field diagnostics

- CPLD timing

- 1:7 Deserialization in Spartan-3E/3A FPGAs at speeds up to 666 Mbps

- Embedded JTAG ACE Player

- V850 standby modes

- Turbo coding on Xtensa processors

- Accelerating MPEG-4 video decoding with an Xtensa processor

- Implementing the Fast Fourier Transform for the Xtensa processor

- Xtensa processor extensions for fast IP packet forwarding

- Xtensa processor extensions for fast IP packet classification

- Xtensa processor extensions for Data Encryption Standard (DES)

- Orion data services service assurance for converged networks

- Orion voice services service assurance for converged networks

- Orion Mobile data service assurance for mobile networks

- Implementing the Advanced Encryption Standard (AES) on Xtensa processors

- Convolutional coding on Xtensa processors

- Implementing FIFO operations using TIE queues

- Fast OFDM on Xtensa processors

- Multi-interface WiMAX R1 protocol analysis with Tektronix G35 and WaveJudge 4800

- APM Voice network assurance for converged networks

- Deploying wireline-quality VoIP by using integrated service level test automation

- Implementing a memory-based mutex and barrier synchronization library

- Optimizing for energy using the Xenergy energy optimizator tool

- Extending the JTAG.v module

- Audio reference design guide addendum: system software example

- Op amp precision design: Random noise

- Emulation flow for Xtensa cores

- Double-precision floating point emulation acceleration

- Diamond Video Engine controller code example—A tutorial on developing control code for the 388VDO Engine

- Using the PIC devices' SSP and MSSP modules for slave I˛C communication

- Using USB keyboard with an embedded host

- Solid state discovered—controllers in a flash

- Application guide hyNet S based IP camera

- Unifying RISC and DSP

- The Microchip TCP/IP Stack

- Understanding load capacitance and access time

- Interfacing Spansion flash to TI OMAP processors

- Designing a serial peripheral interface

- Comparing JTAG, SPI, and I2C

- Bit field programming for flash products based on 230-nm and 200-nm MirrorBit technology

- APM GPRS and UMTS network assurance for mobile networks

- APM UMA network assurance for mobile networks

- Orion interconnect services: Service assurance for converged networks

- Network assurance for IPTV: GeoProbe, Video and APM video

- GeoProbe VoIP network assurance for fixed core and cable networks

- A new reference for 8/16bit microcontroller system performance

- Low-cost implementation of digital oscilloscope in Nextreme structured ASIC

- Structured ASICs—a risk management tool

- Strategies for coping with nonlinear and time variant behavior for high speed serial buffer modeling

- Using a keyboard with the Microchip Graphics Library

- Bootloader for 78K0/Kx2

- Using a scope's segmented memory to capture signals more efficiently

- PCB-design for improved EMC

- Breaking the gigahertz speed barrier with an automated flow using commercial standard cell libraries and memories

- Addressing design challenges in 32bit microcontrollers for automotive and industrial applications

- Recommended usage of Microchip UNI/O bus-compatible serial EEPROMs

- Double programming for high reliability systems
- Wear Leveling
- Agilent 89600 vector signal analysis software option
- Using the MIPS32 M4K processor core SRAM interface in microcontroller applications
- Brief introduction to MIPS32 M4K core shadow registers for microcontroller applications
- How Java software solutions outperform hardware accelerators
- 16bit single-chip microcontrollers
- Motor control by µPD78F0714
- The MIPS32 34K core family: powering next-generation embedded SoCs
- The MIPS32 24KE core family: high-performance RISC cores with DSP enhancements
- 32176 Group: Combination of input pin and DMAC
- 8-, 16- and 32bit single-chip microcontroller

- 8bit single-chip microcontroller
- IIC-Taiwan: New take on IC design
- Update your knowledge base at IIC-Taiwan
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