Contactless smartcard design using the EM simulation software
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2001-08-09 |
| This conference technical paper discusses the core technology of HF in contactless smartcard system, as well as the optimetrics analysis and design flow using an EM simulation software |
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| Use timing-accurate system-level models
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2007-03-16 |
| A virtual system prototype provides a software simulation-based model of the electronic system that allows design teams to improve design productivity, reduce time-to-market and decrease risk |
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| Develop, test handset apps with simulation tools
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2007-05-01 |
| Simulation technology helps software developers write and test high-level application code on the desired OS, then run the application on a particular hardware platform even before the hardware is available |
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| Using low power DSP based multi-mode transceiver for GSM+HomeRF+Bluetooth
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1999-06-29 |
| This article focuses on DSP and software-based multi-mode handset transceiver design that includes architectures of GSM-HomeRF-Bluetooth transceivers, wireless system performance considerations, system component spec. calculation, channel filtering, and power consumption simulation |
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| Co-verification speeded up for design
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2001-06-16 |
| Innoveda's boosted V-CPU hardware/software co-verification system through a link with Axis Systems' simulation accelerator can increase the performance of hardware portions of the co-verification process |
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| Employ advanced logging techniques for SystemVerilog
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2009-04-30 |
| Logging has been widely used in systems and software environments. And most SystemVerilog libraries being used today provide some built-in utilities for logging information from the testbench to low-level text files that can be analyzed after simulation |
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| Boost SDR performance
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2012-01-04 |
| Here are some examples of how software for system simulation of RF end-to-end architecture design can be used to address the software defined radio design challenges |
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| Simulation tools converge on large RFICs
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2002-08-01 |
| This technical article discusses the complexities of using highly integrated tools for testing RFICs and some solutions that can readily assimilate the latest RF simulation software |
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| Peripheral model makes dual run
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2001-03-01 |
| With complex embedded-system designs exceeding 1 million gates, verification has become the critical bottleneck in the design process. |
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| Overcome challenges of ASIC/SoC prototyping with FPGAs
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2011-10-24 |
| Learn about FPGA-based prototyping and the various factors that must be taken into account to successfully implement a prototyping strategy. |
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| Designing 3D-ICs (Part 1)
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2011-12-07 |
| Learn about the tools that can be used to handle a complete backend flow, and enable true 3D design partitioning, synthesis, placement, and routing. |
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| How FPGAs boost medical imaging
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2011-11-29 |
| Learn how field-programmable gate arrays and other computing elements can enhance imaging techniques such as optical coherence tomography. |
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| Long road ahead for analog synthesis
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2000-05-01 |
| It may be a bit like asking why can't women be more like men, but the question, "Why can't analog be more like digital?" is the most common complaint among engineers attempting to use analog design tools. Synthesis (the automatic generation of physical circuitry from a high-level language description) is one area where analog design departs drastically from digital. |
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| Early verification and validation using model-based design
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2010-06-16 |
| The primary way model-based design achieves verification and validation is through testing in simulation |
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| Accelerate processor verification through testbench infrastructure reuse
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2011-09-01 |
| Find out how specialised processor verification IP can eliminate historical development and maintenance commitments. |
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| Prototyping: Virtual vs physical
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2011-12-15 |
| Simulating and analyzing the products in software during the design process provides significant time-to-market and quality advantages over older practices of producing multiple physical prototypes and testing them in the lab |
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| Syntax raises RTL abstraction level
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2001-05-16 |
| A University of Toronto professor has proposed a new RTL abstraction syntax that he claimed can be implemented by a modest extension to traditional imperative programming languages. |
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| Flow is shaky for programmable SoCs
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2001-03-01 |
| Programmable SoC designs are becoming the trend of the future thanks to the greater density of today's programmable devices and the availability of efficient microprocessors. Unfortunately the CAD flows for these devices are far from being robust. |
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| Address hardware/software integration issues with combined prototyping solutions
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2012-01-11 |
| Find out how to reap the individual advantages of prototypes in combination with other prototyping techniques. |
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| Process design kits take aim at custom ICs
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2001-04-15 |
| This technical article describes Cadence Design Systems' process design kits for 0.25µm and 0.18µm process simulations. |
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| Dolphin, Raisonance team-up on microcontroller core
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2001-06-01 |
| The Dolphin Integration and Raisonance team up to create a hierarchical development system for the 8051 8-bit microcontroller core is expected to bring enhancements in the field of control technology. |
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| Programmable system chips move forward
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2001-05-01 |
| Using dedicated hardware to boost real-time performance of embedded systems is a common practice and, with the introduction of PSCs, software engineers will learn how to boost performance of timing-critical software functions |
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| Infiniband requires design trade-offs
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2000-12-01 |
| Primary players in the computer industry are developing the Infiniband architecture as the next generation of server I/O, with the intent of eventually replacing PCI. |
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| JasonTech gives tech support to Microcosm in South Korea
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2001-03-01 |
| Microcosm Technologies Inc., a provider of MEMS CAD/simulation tools and professional services, is setting up a design house in South Korea with JasonTech Inc. providing the necessary technical support |
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| Optimizing ASIC design flow for SoPCs
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2001-05-01 |
| System-on-programmable-chip technology has characteristics of both board-based design and ASIC-based SoC design. The immediate attraction of SoPC is that the design can be up and running very quickly. |
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| Hardware/software co-dev't with emphasis on software
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2012-02-06 |
| Read about the problems of hardware/software co-development from the point of view of the software designer |
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| Debug chip designs with FPGA-powered emulators
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2009-08-25 |
| Creating a hardware emulation system is no easy task. Emulation systems must be easy to program, reliable and affordable. |
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| Extraction method verifies IP functions
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2001-06-01 |
| To keep in pace with silicon technology advancement, verification of the reused custom logic against its original counterpart should be considered as an integral part of the reuse process. |
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| Emulation or prototyping for silicon success?
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2001-04-15 |
| With the high-stakes financial and time-to-market risks involved in designing ICs, which verification method is necessary for first-pass silicon success? |
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| Verification firm starts partners program
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2001-04-15 |
| Seeking deeper integrations with third-party EDA tools, Verisity Design Inc. announced its Verisity Interoperability Partners (VIP) program. This technical article discusses that program and its effect to the EDA industry. |
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