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EE Times Asia - total search 1621 articles sort by date sort by relevance
Reduce auto cabin noise with NVH analysis 2007-05-01
This article describes an approach implemented by LMS International to reduce the noise, vibration and harshness (NVH) levels of a new car model from an automotive OEM  
Reap embedded USB's benefits in appliances 2007-03-01
Concerns about increased cost and complexity have slowed the initial adoption of the USB bus in the appliance world. The USB bus offers many classes of solutions that can be used alternatively or in combination to achieve much more  
Rapid design of media-enabled information appliances 2001-01-01
An integration platform approach can greatly facilitate the rapid development of new products, as well as successors and derivatives. The article takes a look at the design of an information appliance that may spawn many derivatives  
Programmable logic enables powerful SoC solutions 2002-10-01
With the ability to embed complete systems on a single FPGA, programmable logic has enabled a new realm of powerful yet very flexible SoC solutions  
Preventing flip-chip solder joint failures 2001-08-01
Learn about the degradation of solder joints in FCOBs as a result of thermal cycling. The article also seeks to answer how solder joint cracks are initiated and propagated  
Precision jetting allows closer component placement 2004-03-16
One of the limitations on the close placement of components has been the space requirements for underfilling flip-chips, BGAs, and CSPs; and Asymtek's new developed solution makes it unnecessary to insert the needle between components  
Powering LED-backlit LCDs using DC-DC topology (Part 1) 2011-05-09
Learn about the approaches and tradeoffs in supply topologies and configurations, when powering LED arrays  
Power-over-Ethernet goes green 2008-06-02
Here's how the efficiency of PoE systems compares to traditional wall adapters in various applications, and how new techniques and technologies, including dynamic power management and emergency power management, promise to make new PoE solutions more power- and cost-efficient  
Power Tip: Trade AC-line range for input-capacitor ripple current 2011-07-18
Find out more about the relationship between these two significant parameters  
Power tip: Role of common-mode currents in non-isolated power supplies 2011-10-27
Read about the role of this "type" of current flow as an EMI source  
Power tip: Cut transformer interwinding capacitance effects 2011-06-06
Learn about this type of capacitance, the problems it causes and the solution to them  
Power tip: Avoid common multilayer ceramic capacitor issues 2012-07-27
Learn about the potential pitfalls with ceramic capacitors and know how to avoid them  
Power mgmt architecture with internal regulation 2013-10-25
Learn about the viable solutions and alternatives to prevent performance problems in ICs  
Power distribution for high-performance processors 2001-04-01
A new architecture not only addresses issues such as rising current transients, but also considers the limited space available for semiconductor devices and their associated power delivery systems  
Portable Applications Drive Packaging Evolution 2001-03-30
This paper gives an overview about the Micro SMD chip-scale packaging technology. It describes Micro SMD's advantages over traditional leaded plastic packages and explains mounting and handling considerations  
Platform-based SoC design comes of age 2006-04-03
Ongoing silicon scaling has prompted the IC industry to seek new design methodologies, the most notable of which is platform-based SoC design  
Pinout complex FPGAs step-by-step 2008-12-16
I/OI pin assignment is a challenge when integrating large FPGA devices into PCBs. But with smart I/O planning and new tools, you can remove the pain from the pinout process  
Physical design flow taps partition layout 2004-08-02
This article describes a new hierarchical design flow and its usage on a 3 million-gate chip  
Performing synthesis-aware clock analysis 2013-05-23
Read about a tool that performs clock structure analysis by tracing complex clock nets and visually presenting them to designers  
Perform integrated HW/SW verification 2008-01-02
As the lines marking the responsibilities of HW/SW teams and who is responsible for implementation and debug are getting blurred, new methodologies must be adopted to effectively validate an entire IP or silicon solution. The ability to efficiently and optimally design, and perform system-level verification can result in a significant competitive advantage, especially as software solutions become expected deliverables along with complex IP or silicon  
Peak floating-point performance calculations 2014-11-10
Read about a methodology that provides designers a reliable technique for the baseline comparison of the peak floating-point computing capabilities of devices with very different architectures  
PC main power supply design 2002-04-08
This article describes a new single ended forward converter solution  
Packet rings aim at metro nets 2001-05-01
Resilient packet ring (RPR) is a new technology that optimizes unique requirements of metro networks by defining a MAC with two network interfaces  
PA design boosts 3G handset talk time 2006-05-01
This article describes a new PA design concept, in which the PA driver stage operates by itself for low- and medium-output power levels, and the higher-power final PA stage is used only for high-output power operation  
Overcome clock distribution issues in medical imaging 2011-09-01
Learn about clock distribution systems on large scale imaging devices, and the challenges that come with these  
Optimizing the high-speed IrDA extensions 1999-08-01
This paper discusses how high-speed extensions to the IrDA platform will allow an engineer to design new classes of applications  
Optimizing DSPs for multimedia 2006-09-01
With the aid of new design techniques, DSP designers can now address the main areas of power consumption--leakage power, clock trees, logic transitions and power grids  
Optimize Bluetooth car kit design, implementation 2003-11-17
There are many things to be considered in designing a Bluetooth car kit system - hardware and software must be upgraded and new profiles released by the Bluetooth SIG are needed  
Opportunities for FPGA's "Long Tail" 2010-11-22
FPGAs are particularly well suited to Long Tail markets because of their field programmability. Learn more about the advantages of FPGA over hardened-silicon devices  
One approach for debugging of modified designs 2001-03-01
Two engineers describe a methodology of comparing old designs to new designs in order to validate the new one  


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