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Customizable MCUs take on FPGA tasks
Using a customizable MCU with an MPCF allows designers to integrate their custom IP into a near off-the-shelf solution. It offers the cost, power consumption and performance benefits of a full-custom ASIC, with NREs and design cycle that are not much different from those of an off-the-shelf MCU + FPGA design |
2007-11-01 |
Implementing 66MHz-64bit PCI with an FPGA
This paper will illustrate how to use SX-A FPGAs to implement the CorePCI 66MHz-64bit Target+DMA design, a high-performance design that currently cannot be realized with any other FPGA architecture |
2000-05-03 |
EDA Consortium tackles FPGA productivity
The recent EDA Consortium tackled important issues that focus on direct HDL entry and better productivity measurements for designers and engineers. |
2001-06-16 |
Implementing 66MHz-64bit PCI with an FPGA
This paper illustrates how to use the SX-A FPGAs to implement the CorePCI 66MHz-64bit Target+DMA design, a high performance design that currently cannot be realized with any other FPGA architecture |
2000-03-20 |
FPGA clock trees and their efficient use
This article provides description on the features of proASIC and proASICPlus' clock tree as well as its design issues and applications. |
2002-04-08 |
Accelerate algorithms with FPGA coprocessors
Learn code acceleration and techniques for code conversion to hardware coprocessors. |
2006-11-01 |
Improving productivity with FPGA design reuse
This technical article describes the most effective way to fill the productivity gap in silicon integration. |
2000-12-01 |
Tap high-speed FPGA transceiver for PHY
The demand for high-speed transceivers is increasing dramatically as systems are required to support higher data bandwidths, and implement a higher degree of functionality and features density. |
2007-03-16 |
Platform FPGA design ups DSP performance
Emerging tech such as MIMO—which uses complex DSP algorithms requiring massive parallel processing capabilities—are promoting the use of platform FPGAs for DSP solutions. |
2006-10-16 |
Designing FPGA signal-processing datapaths for SDR
This article provides an overview of how several signal processing functions can be implemented in a field programmable gate array. |
2002-04-08 |
Learn how FPGA pares costs in digital displays
To maximize savings provided by a platform-based approach, system electronic components must be carefully selected |
2005-06-16 |
FPGA on-chip debug with off-chip benefits
This article will address some of the limitations of on-chip debug and show users an alternative that combines the best of both worlds--on-chip debug with off-chip, deep sample storage. |
2003-02-17 |
Implement low-power 65nm FPGA designs
This article explores the benefits of reduced power consumption. It also illustrates the many process and architectural innovations implemented in Virtex-5 devices. |
2007-04-16 |
Speeding up FPGA clock schemes
One of the most important steps in the design process is to identify how many different clocks to use and how to route them. |
2004-01-01 |
What makes the FPGA an ideal DSP solution
The core signal processing of high-performance systems has increasingly moved to FPGAs, as they deliver the highest performance programmable DSP available from any semiconductor device. |
2007-09-03 |
| ---Total Search 133 Articles,Total 9 Pages--- |
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