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EE Times Asia - total search 14 articles sort by date sort by relevance
Building PCIe endpoint devices with FPGAs 2007-12-03
This article will review the factors for building single-chip x4- and x8-lane PCIe designs with the latest FPGA technology  
Optimize system performance with PCIe 2008-05-16
PCIe 2.0 is optimizing system performance in many ways. However, long read response latencies that reduce aggregate I/O performance can occur in host-centric PCIe systems when even a single endpoint reads ahead very aggressively to ensure it is never "starved" for data. PCIe Gen 2 switches feature Read Pacing to prevent this kind of performance degradation  
Solving PCIe compliance, interoperability issues 2008-02-01
Since its inception more than five years ago, PCIe technology has become the dominant interconnect protocol across virtually all market segments. There are many challenges involved in verifying device compliance and interoperability. This article discusses these challenges, and proposes the Denali Puresuite Sofwtare Solution as the answer to them  
Test your products for PCIe compliance, interoperability 2007-05-16
Compliance workshops include training sessions on latest PCIe specifications, compliance testing for products, and interoperability testing of PCI products with other member products  
Pick the right bus for your apps 2006-08-01
Engineers should consider key bus attributes such as latency, bandwidth, software support, distance support and availability when determining the appropriate bus for an application. PCIe is particularly well-suited for test and measurement. USB provides widespread availability and easy-to-use plug and play capabilities while LAN is appropriate for distributed applications with modest throughput requirements  
Optimize I/O expansion in workstations 2007-12-17
PCIe switches and PCI-to-PCIe bridges can help get beyond many of the workstation I/O limitations. Steve Moore of PLX Technology invites us to explore how these devices can be used to optimize I/O expansion in high-performance workstations  
Moving forward with hardware emulation 2007-12-17
Sun Microsystems shares the experience of using latest generation hardware-based verification systems to develop its recently launched Ultrasparc T2 processor.  
New formula to speed up PCB designs 2008-05-16
PCB designers need a methodology that helps them avoid design iterations between the design and layout stages, or finding issues with the board in the lab with a physical prototype. Hemant Shah of Cadence Design Systems discusses how a "correct-by-construction" PCB layout methodology can help PCB designers shorten their design cycle.  
Reduce EMI with proper SI design 2008-04-01
This article provides a summary of the important design considerations and presents an LVDS case study for integrated signal integrity, power integrity, and EMI design.  
Predicting jitter with cable tests 2009-08-19
This article highlights the phenomenon of data jitter caused by conversions between differential and common-mode components of the video signal.  
Debugging with high-bandwidth mixed-signal oscilloscopes 2009-12-10
This article highlights a few of the challenges and how mixed-signal oscilloscope (MSO) can overcome these challenges.  
Scalable approach to fabric interface controllers 2006-03-16
System modularity demands a common interconnect to support the seamless integration of silicon and/or subsystems in multiple apps.  
Virtual instrumentation for different apps 2006-07-17
As a standard platform for test and measurement applications, PXI takes advantage of commercial technologies to help increase the performance and lower the cost of test systems  
Use modular instruments for A/V test 2007-03-01
This article describes how modular instrumentation allows for the development of scalable solutions for A/V test that integrate the functionality from a slew of instrumentation suppliers while lowering cost and increasing efficiency.  


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