Automate formal verification for OCP
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2008-09-01 |
| The automation of formal protocol verification using VIPs enables a rapid and exhaustive verification of critical IP interfaces. Once a VIP library is written and tested, it can be re-used to improve the verification quality and shorten the verification schedule. VIPs can also be used to ease the verification of high-level system properties since they provide a "free" environment |
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| A practical way of inspecting IP quality
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2011-10-12 |
| Find out how to set up a process which can give you solid incoming IP quality inspection—a process that quite likely finds potential problems you may not have checked before, all with a minimum of overhead both in maintenance and in cycle time |
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| Impact of 4Gbps FireWire on industrial apps
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2012-01-18 |
| Find out how FireWire paves the way for more advances in industrial applications. |
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| How FPGAs boost medical imaging
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2011-11-29 |
| Learn how field-programmable gate arrays and other computing elements can enhance imaging techniques such as optical coherence tomography. |
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| Long road ahead for analog synthesis
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2000-05-01 |
| It may be a bit like asking why can't women be more like men, but the question, "Why can't analog be more like digital?" is the most common complaint among engineers attempting to use analog design tools. Synthesis (the automatic generation of physical circuitry from a high-level language description) is one area where analog design departs drastically from digital. |
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| Hardware/software co-dev't with emphasis on software
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2012-02-06 |
| Read about the problems of hardware/software co-development from the point of view of the software designer. |
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| Identifying the 4G PHY architecture design challenges
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2011-12-20 |
| LTE-A is an evolution of the LTE standard with a number of enhancements that create significant design challenges. |
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| Address 4G issues with SystemVue
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2011-12-23 |
| A number of EDA tools available on the market today can be used for LTE-based design; however, creating systems designs for the emerging LTE-A standard requires an entirely new set of functionality. |
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| Silicon prototyping verifies IP functions
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2001-06-01 |
| SoC designers are confronting several important tasks in optimizing next-generation products. New systematic approaches are needed to ensure that IP can be transferred from one process geometry to the next |
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| Web-based EDA tools come to Asia
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2000-09-01 |
| We can shop for clothing and record albums over the Internet; we can order food, and even have love affairs! Why not design ICs? This was the underlying theme at the recently concluded Design Automation Conference (DAC 2000) in Los Angeles. Look, for example, at the thinking process harnessed by Barcelona Design Systems. |
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| Analog, mixed-signal design flow found wanting
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2001-06-16 |
| Different views cloud the current analog/mixed-signal design flow issue and should stop concentrating on the problem but find a lasting solution for the industry to further prosper. |
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| Embedded Linux and the Law
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2002-11-01 |
| The rising popularity of Linux, combined with perceived cost savings, has spurred many embedded developers to consider a real-time Linux variant as an alternative to a traditional RTOS. |
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| Fitting last year's IP to today's processes
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2001-06-01 |
| Changing design styles in IP reuse should prompt engineers to be more receptive to future design shifts in the industry |
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| Choosing the right design flow model with integrated architecture
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2004-02-02 |
| Users of ASIC, COT and COPD models are finding that flows based on an integrated RTL-to-GDSII system can offer additional benefits when fully leveraged. |
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| Extraction method verifies IP functions
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2001-06-01 |
| To keep in pace with silicon technology advancement, verification of the reused custom logic against its original counterpart should be considered as an integral part of the reuse process. |
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