Optimize power with next-gen ASSP
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2007-09-03 |
| Designers of battery-powered handheld products have a number of options to ensure that battery life is optimized for their particular configuration. |
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| Ease automotive graphics design
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2008-05-16 |
| Says Kerry Howell of Lattice Semiconductor, when automotive graphics designers use a standard ASSP or a custom ASIC as the controller, they encounter a few speed bumps on the road to system implementation. The versatile nature of FPGA devices, plus commercially available intellectual property, allows for the integration of almost all the graphics system functions in one device |
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| Increase options for stepper motor control
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2008-01-02 |
| ASSP solutions for stepper motor drive electronics integrate all necessary driver, feedback and correction functions while implementing sensorless control |
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| Overcome challenges of ASIC/SoC prototyping with FPGAs
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2011-10-24 |
| Learn about FPGA-based prototyping and the various factors that must be taken into account to successfully implement a prototyping strategy. |
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| Logic suppliers seek ways to embed FPGAs
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2001-03-01 |
| Driven by the convergence of communications, computing and consumer applications, SoC design complexity increases the time required to bring competitive products to market, putting a premium on design speed and flexibility. |
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| Debug chip designs with FPGA-powered emulators
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2009-08-25 |
| Creating a hardware emulation system is no easy task. Emulation systems must be easy to program, reliable and affordable. |
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| Achieve scalable, flexible in-vehicle networking
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2008-06-16 |
| FPGAs and full IP solutions give automotive engineers options in optimizing their electrical architectures. |
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| EDA Consortium tackles FPGA productivity
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2001-06-16 |
| The recent EDA Consortium tackled important issues that focus on direct HDL entry and better productivity measurements for designers and engineers. |
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| Programmable Logic Devices: Viable solutions for implementing error-coding functions
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1999-04-08 |
| With the increasing need for the transmission of digital data over a wide variety of mediums, the need for error control coding will increase significantly as well. Reed-Solomon and Viterbi coding provides a robust error control method for many common types of data transfer mediums, particular those that are one-way or that are noisy and sure to produce errors. This application note deals with these Reed-Solomon and Viterbi solutions. |
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| Implementing 66MHz-64bit PCI with an FPGA
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2000-03-20 |
| This paper illustrates how to use the SX-A FPGAs to implement the CorePCI 66MHz-64bit Target+DMA design, a high performance design that currently cannot be realized with any other FPGA architecture. |
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| Selecting a CPU core for multi-CPU SoC designs
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2003-03-03 |
| This article examines the many features of processor cores being considered for multi-CPU designs. |
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| Learn how FPGA pares costs in digital displays
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2005-06-16 |
| To maximize savings provided by a platform-based approach, system electronic components must be carefully selected |
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| Integration drives embedded HW, SW development
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2005-01-03 |
| Effective integration of hardware and software flows leads to a reduction in late design errors while improving overall efficiency. |
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| Configurable logic for wireless communications: Carrier and symbol synchronization
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2000-09-27 |
| Software-defined radios (SDR) are highly configurable hardware platforms that provide the technology for realizing the rapidly expanding third (and future) generation digital wireless infrastructure. This paper is about carrier and timing synchronization in SDRs using FPGA-based signal processors. |
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| Implementing packet transfer over SONET/SDH
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1999-06-29 |
| This paper describes the theory and implementation of a quad OC-3/STM-1 and OC-12/STM-4 Ethernet over SONET/SDH using several applications specific standards products (ASSPs). |
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| Hitting the 10Gbps backplane mark
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2004-07-01 |
| To reach the 10Gb backplane plateau, designers need Serdes that can accommodate dynamic environmental conditions. |
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| Selecting ASICs or ASSPs for key net functions
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2003-07-16 |
| Network system design activity is accelerating with a renewed emphasis on product differentiation and cost-effectiveness. System design teams must evaluate technology options that usually lead them to choose between ASICs and ASSPs for most of the network packet processing functions they require. |
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| Implementing 66MHz-64bit PCI with an FPGA
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2000-05-03 |
| This paper will illustrate how to use SX-A FPGAs to implement the CorePCI 66MHz-64bit Target+DMA design, a high-performance design that currently cannot be realized with any other FPGA architecture. |
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| FPGA co-processors optimize car infotainment, telematics
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2004-11-01 |
| As entertainment electronics becomes a primary source of differentiation among luxury vehicles, carmakers can rev up their designs with FPGA co-processing. |
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| Power management provides design simplicity for handhelds
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2004-07-01 |
| Designers of battery-powered handheld products have turned to ASICs for power-path control, protection and USB current limiting. |
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| Bringing floating-point math to the masses
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2006-10-02 |
| Floating-point arithmetic is designed to meet precision and performance requirements for an increasing number of applications. |
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