An introduction to DSP applications using the AT40K FPGA
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1999-11-16 |
| This application note deals with the AT40K FPGA and the macrofunctions employed in SRAM-based DSP |
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| Targeting Cypress PLDs from the Synopsys FPGA Express environment
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2001-03-29 |
| This application note demonstrates how to target Cypress Semiconductor's FLASH370i and Ultra37000 families of CPLDs using the synthesis and netlist capability of the Synopsys FPGA Express environment |
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| The role of distributed arithmetic in FPGA-based signal processing
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2001-04-12 |
| This application note derives the distributed arithmetic (DA) algorithm in embedding DSP functions in FPGA devices, and provides examples that illustrate its effectiveness in producing gate-efficient designs |
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| C code for interfacing AVR to AT17LVXXX FPGA configuration memories
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2004-12-02 |
| This app note describes how to in-system-program (ISP) an Atmel FPGA configuration memory using an Atmel AVR microcontroller; and how to bit bang a two-wire interface (TWI) using port pins on an AT90S8515 AVR microcontroller |
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| Spartan-3A DSP FPGA Video Starter Kit
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2008-05-26 |
| This guide provides a brief overview of the Spartan-3A DSP FPGA Video Starter Kit (VSK) and how to run a set of pre-defined demonstration designs |
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| Interfacing the QDR to the Xilinx Spartan-II FPGA
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2001-03-27 |
| This application note introduces the enhanced Quad Data Rate (QDR) SRAM architecture, and describes the interface between this high-speed SRAM and the Xilinx Spartan-II FPGA |
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| ORCA series 3 to series 4 FPGA design conversion
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2002-12-06 |
| This application note outlines the caveats and steps for the successful migration of ORCA series 3 FPGA designs to ORCA series 4 |
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| FPGA-based FIR filter using bit-serial digital signal processing
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2000-09-06 |
| This application note describes the implementation of an FIR filter with variable coefficients that fits in a single AT6002 FPGA |
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| Xilinx FPGA IFF copy protection with 1-Wire SHA-1 secure memories
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2006-12-01 |
| This application note how the Identification Friend or Foe (IFF) authentication concept in conjunction with secure memories provides secure control and copy protection of FPGA designs. The IFF approach also enables the implementation of soft-feature management and board identification |
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| Expanding the payload with National's FPGA-link DS32ELX0421 and DS32ELX0124 serializer and deserializer
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2008-11-18 |
| National's family of FPGA-Link (DS32ELX0421 &DS32ELX0124) serializers and deserializers operate at serial data rates up to 3.125Gbit/s |
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| ORCA Series 4 FPGA PLL Elements
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2002-11-20 |
| This application note discusses the ORCA Series 4 FPGA PLL Elements, designed for the delivery of networking IP |
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| High-speed ADC THS1041and FPGA interface considerations
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2007-05-04 |
| The THS1041 from Texas Instruments is a 10bit, 40MSPS, high-speed ADC. For many years because of its low power dissipation and extended life, it has been used in various applications such as programmable gain amplifier and built-in clamp. With recent FPGA development, some application systems have been upgraded with a direct interface of the THS1041 to an FPGA, for example, by connecting I/O pins of the THS1041 to the I/O pins of Xilinx Spartan-3 or Altera PLD. For such an interface, a power-on initial state should be considered in the interface design. Otherwise, the power-on initial state of the FPGA can affect the initial state of THS1041 and in some cases, affect the entire application system. In order to ensure the successful interfacing of the THS1041 to an FPGA, a test was conducted, and this application report presents those results |
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| How to design today for the upcoming Spartan XL FPGA family
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2000-06-20 |
| This application note explains how to design a prototype for a Spartan-XL FPGA today. By following the design guidelines presented in this note, such a prototype can easily be converted to using a Spartan-XL device, once the new family becomes available |
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| FPGA configuration guidelines
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2000-06-27 |
| This application note discusses FPGA configuration guidelines that describe the configuration process for all members of the XC2000, XC3000, XC4000 and XC5200 FPGA devices and their derivatives |
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| LM1771 and LM3880 based FPGA power supply reference design
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2008-03-17 |
| This application note discusses the Virtex-5 FPGA power supply prerequisites in terms of the multiple voltage rail and current level requirements, output sequencing, and startup characteristics |
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