Programming cascaded configurators
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2000-09-05 |
| This application note describes the mechanism of in-system programming (ISP) of multiple devices and the implementation of an example design. |
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| Using the ORCA Series 4 EBR as a True Quad-Port RAM
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2002-12-11 |
| This application note provides the details required to use the ORCA Series 4 EBR as a true quad-port memory. |
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| Clock networks in the PolarPro devices
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2008-11-10 |
| This application note discusses the routing structure of the clock networks, the logic blocks and ports that each clock network can drive, and the use and advantages of each clock network. |
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| Using the dedicated carry logic in XC4000E
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2000-06-22 |
| This application note describes the operation of the XC4000E dedicated carry logic, the standard configurations provided for its use, and how these are combined into arithmetic functions and counters. |
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| Flash memory PCI add-in card for embedded systems
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1999-10-25 |
| The Flash memory PCI add-in card was created to demonstrate the feasibility of interfacing the Flash memory to the PCI bus in an embedded system. In such a system, Flash memory devices are used for high density and high performance storage for user code and data. This application note describes the Flash memory OCI add-in card. |
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| 16-Tap, 8-Bit FIR filter applications guide
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2000-06-22 |
| This application note describes the functionality and integration of a 16-tap, 8-bit Finite Impulse Response (FIR) filter macro with predefined coefficients, such as low pass, and a sample rate of 5.44MSa/s or 784 MIPS using an XC4000-4 device. |
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| Using three-state enable registers in XLA, XV, and SpartanXL FPGAs
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2000-06-21 |
| This application note shows how to use hard macros to implement the use of the internal IOB three-state control register, which can significantly improve output enable and disable time, in both HDL- and schematic-based designs. |
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| Bus-Structured Serial Input/Output Device
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2000-06-26 |
| This application note discusses how to implement an extensive bus structure by using simple shift registers to illustrate how 3-state busses may be used within an LCA device. |
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| Ripple-carry adders
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2000-09-01 |
| This application note shows how the AT6000 architecture is ideally suited for implementing arithmetic operations, such as parallel adders, via a NAND and an XOR available simultaneously in a single cell. |
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| Interfacing LVDS devices to QuickLogic Eclipse and Eclipse-II FPGAs
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2008-11-11 |
| This application note discusses software implementation and board level issues when interfacing LVDS devices with QuickLogic Eclipse FPGAs. |
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| Performing nibble and dibit switching with the MT90820 (LDX)
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2002-12-04 |
| This application note illustrates the use of the MT90820 as a dibit or nibble switch. |
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| Connecting Xilinx FPGAs to the Philips A-rate fiber-optic transceiver
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2004-12-10 |
| This app note explains how a Xilinx Virtex-II or Virtex-II Pro device can connect to a Philips TZA3015HW 30Mbps to 3.2Gbps A-rate 4-bit fiber-optic transceiver. |
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| Accelerating loadable counters in XC4000
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2000-06-22 |
| This application note describes a technique for increasing the performance of very compact, high-performance counters, which are provided by the XC4000 dedicated carry logic, using minimum additional logic. |
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| The express configuration of SpartanXL FPGAs
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2000-06-21 |
| This application note provides information on how to perform Express configuration, which uses an 8-bit-wide bus path for fast configuration, specifically for the SpartanXL family of FPGAs. |
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| Symmetrical 24-tap FIR filter Macro (FIR24S)
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2000-09-06 |
| This application note details the implementation of a symmetrical 24-tap FIR filter Macro in the AT6000 Series FPGAs. |
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