Embedding high-performance, low-cost DSP functions
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2008-09-17 |
| This document takes a look at some common high-performance DSP functions and calculates their effective implementation cost based on the published pricing of the underlying FPGA |
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| Spartan-3A DSP S3D1800A starter platform features and functions
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2008-05-26 |
| The Spartan-3A DSP S3D1800A Starter Platform highlights the unique features of the Spartan-3E FPGA family and provides a convenient development board for embedded processing applications |
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| ORCA Series 4 Clocking Strategies
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2002-12-06 |
| This application note discusses the clocking strategies for the ORCA series 4 FPGA |
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| ECU and DSP function
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2008-10-20 |
| This document describes the use of embedded computational units (ECUs) in QuickLogic FPGAs to implement DSP functions. |
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| Designing for performance on flash-based FPGAs
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2008-10-08 |
| This paper introduces the main ingredients for tackling this problem without penalties or frustration. |
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| Ceramic column grid array
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2008-10-01 |
| CCGA packages are becoming increasingly popular as an alternative to CBGA packages for applications requiring very high-density interconnections with higher board-level reliability. |
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| Power-Up/Down of Fusion FPGAs
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2008-10-16 |
| The Actel Fusion Programmable System Chip satisfies the demand from system architects for a device that simplifies design and unleashes their creativity. |
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| Multiple-boot with Platform Flash PROMs
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2008-09-13 |
| This application note will further describe how Platform Flash PROMs provide additional options for enhancing safety in the event of failed configuration, as well as reducing pin count and board space. |
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| Get your priorities right: Make your design up to 50% smaller
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2008-09-24 |
| The ideas contained here might not yield the full 50 percent savings potential in your design, but should save a significant amount. A 20 percent reduction in size can mean your design fits into a smaller device. The smaller size also helps those designers who are looking for higher performance by potentially saving a speed grade. |
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| Dual DIMM DDR2 SDRAM memory interface design guidelines
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2007-03-05 |
| As applications become more demanding, deeper memory is required leading to the need for more than one DIMM memory configuration. This application note focuses on the system implementation of a dual unbuffered DIMM DDR2 SDRAM memory interface, operating at 267MHz/533Mbps. |
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| Powering FPGAs using LM201xx PowerWise synchronous buck regulators
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2008-02-08 |
| The LM201xx PowerWise synchronous buck regulators are full-featured products, capable of delivering up to 5A of continuous output current. |
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| Power-Up/-Down Behavior of Low-Power Flash Devices
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2008-10-17 |
| Actel's low-power flash devices are flash-based FPGAs manufactured on a 0.13µm process node. |
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| Xilinx in-system programming using an embedded microcontroller
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2008-06-09 |
| By using an embedded controller to program the Xilinx CPLDs and FPGAs from an on-board RAM or EPROM, designers can easily upgrade, modify, and test designs, even in the field. |
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| Powering and configuring Spartan-3 Generation FPGAs in compliant PCI applications
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2008-05-26 |
| The information presented in this application note applies to compliant PCI applications using Spartan-3 Generation FPGAs. |
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| Extended Spartan-3A family overview
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2008-09-11 |
| The Extended Spartan-3A family of FPGAs solves the design challenges in many high volume, cost-sensitive electronic applications. |
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