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Interfacing the QDR to the Xilinx Spartan-II FPGA 2001-03-27
This application note introduces the enhanced Quad Data Rate (QDR) SRAM architecture, and describes the interface between this high-speed SRAM and the Xilinx Spartan-II FPGA  
Micron ECC module for NAND flash via Xilinx Spartan-3 FPGA 2008-05-13
This technical note describes the features of the Micron NAND Flash ECC module and how it calculates and implements ECC.  
Design methodologies for core-based FPGA designs 2000-06-29
This application note will explore the core-based design issues facing engineers and present a solution for addressing these issues during the design entry, design implementation and design verification stages of the product development cycle.  
Power management controller for mixed-voltage FPGA based systems 2006-06-02
The versatility of the ISL6521 lends well to powering most any embedded processor or logic device which require a regulated high current, low voltage supply and up to three independent, lower current supplies.  
DDR SDRAM controller using Virtex-4 FPGA devices 2004-12-10
This app note describes a 200MHz DDR SDRAM (JEDEC DDR400, PC3200 standard) controller implemented in a Virtex-4 XC4VLX25 FF668 -10 device.  
Controlling FPGA configuration with a Flash-based microcontroller 2000-08-28
This application note shows different options for space-saving realization, design protection or for fast, flexible reconfiguration of SRAM-based FPGAs.  
Configuring mixed FPGA daisy chains 2000-06-23
This application note demonstrates how to configure the XC2000, XC3000, XC4000 and XC5200 FPGAs in a common daisy-chain structure.  
UTOPIA Level 3 in ORCA Series 3 FPGA 2002-12-11
This application note describes the functions and features of the Utopia Level 3 in ORCA Series 3 FPGAs  
Implementing a brushless DC motor controller on an IGLOO FPGA 2008-10-01
The main objective of the design is to commutate a three-phase BLDC motor which has Hall sensor feedback  
FPGA interface to the TMSC6000 DSP platform using EMIF 2004-12-10
This app note presents the connection of Xilinx FPGAs to a Texas Instruments TMSC6000 DSP platform using the available external memory interface (EMIF).  
I/O characteristics of the 'XL FPGAs 2000-06-20
This application note describes I/O parameters of the 'XL FPGA family in analog terms, giving the designer a better understanding of the circuit behavior  
Edge detection in AT6000 FPGAs 2000-09-05
This application note presents a reference design of a fully pipelined bit-parallel edge detection circuit that utilizes only pipelined adders and fits into one AT6010 FPGA  
Connecting Xilinx FPGAs to Texas Instruments ADS527x series ADCs 2004-12-10
This app note describes how to connect a high-speed Texas Instruments (TI) ADS5273 analog-to-digital converter (ADC) with serialized LVDS output to a Virtex-II or Virtex-II Pro FPGA  
Reading user data from configuration PROMs 2004-12-10
This app note describes how to retrieve user-defined data from Xilinx configuration PROMs after the same PROM has configured the FPGA  
16-word by 8-bit FIFO 2000-09-05
This application note demonstrates how to implement the AT6000 Series FPGA as a synchronous FIFO register buffer with a word width and depth tailored to specific design needs  


EE Times India - Total Search 749 Articles
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Say goodbye to remote controls 2008-10-03
PCIe XMC offers obsolescence-proof design 2008-10-01
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