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| 2010-07-22 | TSMC, ARM agree on long-term collaboration TSMC and ARM signed a long-term strategic agreement to achieve optimized Systems-On-Chip (SoCs). |
| 2006-01-26 | Synthesis tool combines advantages of flat, hierarchical design It's one thing to design individual blocks for large systems-on-chip and another to tie them together into a working device. Sierra tackles the latter challenge with its Pinnacle Chip Assembly solution. |
| 2005-05-04 | Dynamically reconfigurable SoC supports 'silicon-sharing' Atmel launched what it calls the industry's first family of dynamically reconfigurable SoCs that allows multiple interfaces, peripherals and/or operators to share the same silicon at different times. |
| 2005-03-01 | Verification issues for reconfigurable IP To improve reusability, IP providers are developing clever ways to configure IP and enable semicustom IP blocks while reducing the potential to break the code |
| 2005-04-12 | Intel's Singer calls for 'platform-oriented' tools Calling on the EDA industry to broaden its scope, Intel executive Gadi Singer cited the need for tools that support complete "platforms," including multiple chips and software, in a keynote speech at the Electronic Design Processes (EDP). |
| 2004-03-30 | Researchers seek bricks to build nanoscale structures A systems strategy to make nanoscale devices as reproducible and controllable as silicon systems-on-chip is being urged by a pioneer in this growing world of shrinking sizes. |
| 2001-06-01 | Plato unwraps router for huge systems-on-chip Plato unwraps router for huge systems-on-chip |
| 2000-09-01 | DFT and BIST for SoC designs Design for testability (DFT) and built-in self-test (BIST) techniques are widely publicized in SoC (Systems-on-Chip) designs, but are still often only thought of as "back end" concerns. In reality, the importance of these techniques insures the highest fault coverage and shortest production test time in the device design cycle. |
| 2000-04-01 | Built-In Self-Test—a new technology for Systems-on-Chip Built-In Self-Test—a new technology for Systems-on-Chip |
| 2000-02-01 | The future of mixed-signal design I hear two contradictory things regarding mixed-signal IC design. One set of voices says the systems-on-chip (SoC) of the future will be large mixed-signal systems, and the proportion of these being built will double from about 33 percent currently to 66 percent by 2005. The other set of voices says everything will be big digital chips constructed in ever-deeper submicron CMOS, in that the ASICs of the future will use as many 15 million logic gates, but that the analog and mixed-signal circuitry will be left off-chip. |
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