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| 2012-02-09 | FujiPanaRene: Clinging to the wreckage Can this radical move make economies of scale for both Japan and Abu Dhabi, or is it a move that is not radical enough; two people afloat clinging to each other in the hope they can each save the other from drowning. |
| 2012-02-09 | Japan Inc. swims in troubled seas The merger of Panasonic, Fujitsu and Renasas may salvage the weaker players of the three (Fujitsu and Panasonic) to survive for several more years through government handouts. But the move threatens the potential winner (Renesas Mobile) with a reduction to irrelevancy in the already very competitive mobile SoC market. |
| 2012-02-09 | Renesas, Fujitsu, Panasonic to merge IC ops The Japanese chip vendors are ironing out plans to integrate system chip manufacturing divisions as separate from their design divisions. |
| 2012-02-07 | Merging digital, analog designs More and more SoCs are integrating both digital and analog circuits on the same chip to gain performance and power efficiency benefits. This creates challenges for chip designers. |
| 2012-02-06 | TSMC to roll 3D IC assembly service next year The company has one year to get all physical design kits and EDA support in place to allow customers to design with COWOS, the technology standing for chip on wafer on substrate. |
| 2012-02-02 | DEF: The best bet to fight crosstalk While there is no fail safe solution for measuring the effects of cross talk on a chip, the best existing solution is decision feedback equalizer, a type of circuit that can be inserted into a design to minimize crosstalk. |
| 2012-01-26 | Apple tops 2011 chip buyer list Apple tops 2011 chip buyer list |
| 2011-11-28 | Microserver chip features 1.2GHz clock speed Microserver chip features 1.2GHz clock speed |
| 2011-11-22 | Issues of EUV lithography Chip makers need EUV to be ready well in advance of when they plan to use it in volume manufacturing so they can establish chip design rules and tweak their manufacturing processes. |
| 2011-10-18 | Bitmicro opens microelectronics center in the Philippines Bitmicro Networks has opened a training center in the Philippines that will focus on chip design and engineering. |
| 2011-10-14 | Energy Micro earns ISO certification The chip company has gained ISO 9001:2008 certification for the design and manufacture of energy-friendly MCUs and RF radios. |
| 2011-10-05 | The myth of the $100M ASIC The notion that leading-edge chips require $100 million to develop has severely decimated levels of venture capital investments in semiconductors, thus diminishing innovation in the industry and the economy. |
| 2011-09-01 | GlobalFoundries tests 20nm chip GlobalFoundries tests 20nm chip |
| 2011-08-23 | Reference design supports IEEE 1588 implementation Reference design supports IEEE 1588 implementation |
| 2011-06-27 | PCIe Gen 4 to deliver 16GTps throughput While it claims copper could yield one more PCIe version, the PCI SIG is now doing simulations using chip, channel, packet and socket data for PCIe Gen 4, which could deliver throughput of 16GTps. |
| 2011-06-23 | Accellera, OSCI team up unifies EDA standards Accellera and OSCI are joining forces to create a single organization, a move that will accelerate development of system-level standards as well as chip design and verification standards. |
| 2011-06-28 | Using CC1190 front end with CC1101 under FCC 15.247 Know what to expect when using a CC1101- CC1190 design under FCC Section 15.247 in the 902-928MHz frequency band. |
| 2011-06-23 | NEC targets U.S., European design houses with HLS tool NEC targets U.S., European design houses with HLS tool |
| 2011-06-20 | 3D merges chip production routes 3D merges chip production routes |
| 2011-06-07 | STMicroelectronics completes 20nm chip tapeout STMicroelectronics completes 20nm chip tapeout |
| 2011-06-07 | Chip solution automates IC design planning Chip solution automates IC design planning |
| 2011-06-03 | Infineon invests $350 million in Singapore Infineon will invest as much as $350 million in Singapore in the coming years, starting with an initial infusion of $70 million and hiring 130 new employees for its design center there in 2011. |
| 2011-05-09 | Intel transistor uses 3D structure Intel has released a 3D transistor design called Tri-Gate into high-volume manufacturing at the 22nm node in an Intel chip codenamed 'Ivy Bridge.' |
| 2011-05-13 | 78M6613 hardware design guidelines 78M6613 hardware design guidelines |
| 2011-04-28 | Packaging tool offers advanced miniaturization Cadence has unveiled the Allegro 16.5 PCB and IC packaging technology, offering capabilities that increase both productivity and predictability across silicon, SoC and system development. |
| 2011-04-27 | 78M6618 hardware design guidelines 78M6618 hardware design guidelines |
| 2011-04-26 | 78M6612 hardware design guidelines 78M6612 hardware design guidelines |
| 2011-03-21 | ChipEstimate.com opens VIP microsite The microsite offered by Cadence Design Systems' ChipEstimate.com makes it easier for engineers to find the most up-to-date information and appropriate verification IP for their SoC and chip designs. |
| 2011-02-14 | ST Micro, TriQuint among top MEMS vendors in 2010 STMicroelectronics and TriQuint were last year's fastest growing MEMS chip vendors, thanks to MEMS chip design wins in both the Apple iPhone 4 and the iPad. |
| 2011-02-07 | Overcome smart utility meter design challenges Overcome smart utility meter design challenges |
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