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Software ISO 7816 I/O line implementation
(2000-08-31)
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Scan path insertion and automatic test pattern generation
(2000-08-31)
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AVR034: Mixing C and assembly code with IAR embedded workbench for AVR
(2000-08-31)
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AVR313: Interfacing the PC AT keyboard
(2000-08-31)
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AVR032: Linker command files for the IAR ICCA90 compiler
(2000-08-30)
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A digital thermometer using the AT89C2051 microcontroller
(2000-08-30)
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Software DMA implementation
(2000-08-30)
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AVR300: Software I²C master interface
(2000-08-30)
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Clock buffer cell user guide
(2000-08-30)
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Designing ATL60 series gate arrays for mixed voltage operation
(2000-08-30)
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AVR236: CRC check of program memory
(2000-08-30)
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AVR305: Half duplex compact software UART
(2000-08-30)
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AVR302: Software I²C slave implementation
(2000-08-30)
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Analog-to-digital conversion utilizing the AT89CX051 microcontrollers
(2000-08-29)
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AVR200: Multiply and divide routines
(2000-08-29)
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AVR304: Half duplex interrupt driven software UART
(2000-08-29)
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Configuration of 3V/5V input/output cells
(2000-08-29)
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Interfacing AT93CXX serial EEPROMs with AT89CX051 microcontrollers
(2000-08-29)
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Scan insertion and ATPG development via Synopsys test compiler
(2000-08-29)
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Interfacing AT25XXX serial EEPROMs with AT89CXX microcontrollers
(2000-08-29)
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Compiled megacell testing
(2000-08-29)
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AVR204: BCD arithmetics
(2000-08-29)
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RC effects in nets
(2000-08-28)
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Power On Reset user notes
(2000-08-28)
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Using the AT89C2051 microcontroller as a virtual machine
(2000-08-28)
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AVR100: Accessing the EEPROM
(2000-08-28)
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AVR128: Setup and use the analog comparator
(2000-08-28)
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Controlling buses
(2000-08-28)
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Hints, tips and tricks for using XABEL with Xilinx M1.5 design and implementation tools
(2000-06-29)
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Status and control semaphore registers using partial reconfiguration
(2000-06-29)
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The TagalyzerA JTAG boundary scan debug tool
(2000-06-29)
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FPGA configuration guidelines
(2000-06-27)
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Multiplexers and barrel shifters in XC3000/XC3100
(2000-06-27)
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Harmonic Frequency Synthesizer and FSK Modulator
(2000-06-26)
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Pulse-width modulation in Xilinx programmable logic
(2000-06-26)
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Configuring FPGAs over a processor bus
(2000-06-26)
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hongkong@xilinx.com
(2000-06-26)
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Using the Virtex delay-locked loop
(2000-06-26)
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XC4000 series technical information
(2000-06-26)
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Complex Digital Waveform Generator
(2000-06-26)
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Bus-Structured Serial Input/Output Device
(2000-06-26)
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Building high performance FIR filters using KCMs
(2000-06-23)
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Using the dedicated carry logic in XC4000E
(2000-06-22)
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16-Tap, 8-Bit FIR filter applications guide
(2000-06-22)
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Implementing state machines in LCA devices
(2000-06-22)
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Accelerating loadable counters in XC4000
(2000-06-22)
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Ultra-fast synchronous counters
(2000-06-22)
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Estimating the performance of XC4000E adders and counters
(2000-06-22)
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Using three-state enable registers in XLA, XV, and SpartanXL FPGAs
(2000-06-21)
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Using manual power down mode with SpartanXL FPGAs
(2000-06-21)
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