Application Notes (Sorted By Date)
-
Optimizing impedance discontinuity caused by surface mount pads for high-speed channel designs
(2009-02-24)
-
PCB dielectric material selection and fiber weave effect on high-speed channel routing
(2009-02-23)
-
Cyclone III configuration interface guidelines with EPCS devices
(2009-02-13)
-
Implementing Bus LVDS interface in Cyclone III, Stratix III, and Stratix IV devices
(2009-02-12)
-
DDR3 SDRAM memory interface termination and layout guidelines
(2009-02-11)
-
Stratix IV design guidelines
(2009-02-10)
-
Using high-performance DDR, DDR2, and DDR3 SDRAM with SOPC Builder
(2009-02-09)
-
Virtex-5 Embedded Tri-Mode Ethernet MAC hardware demonstration platform
(2009-02-06)
-
Indirect programming of BPI PROMs with Virtex-5 FPGAs
(2009-02-05)
-
MultiBoot with Virtex-5 FPGAs and Platform Flash XL
(2009-02-04)
-
24K FFT for 3GPP LTE RACH detection
(2009-01-30)
-
Power optimization in Stratix IV FPGAs
(2009-01-29)
-
RapidIO interoperability with TI 6482 DSP reference design
(2009-01-28)
-
Using the design security feature in Stratix III devices
(2009-01-27)
-
Polyphase modulation using a FPGA for high-speed applications
(2009-01-26)
-
RLDRAM II memory interface for Virtex-5 FPGAs
(2009-01-23)
-
Multiplexing SDIO devices Using MAX II CPLDs
(2009-01-23)
-
Interfacing LVPECL 3.3V drivers with Xilinx 2.5V differential receivers
(2009-01-22)
-
Cyclone III simultaneous switching noise (SSN) design guidelines
(2009-01-22)
-
Fail-safe MultiBoot reference design
(2009-01-21)
-
Implementing PLL reconfiguration in Cyclone III devices
(2009-01-21)
-
QR matrix decomposition
(2009-01-20)
-
DSP system design in Stratix III devices
(2009-01-19)
-
Implementing OFDM modulation for wireless communications
(2009-01-16)
-
Cyclone III design guidelines
(2009-01-15)
-
Guidelines for developing a Nios II HAL device driver
(2009-01-14)
-
HardCopy II ASIC fitting techniques
(2009-01-13)
-
Using DDR3 SDRAM in Stratix III and Stratix IV devices
(2009-01-12)
-
Video and image processing example design
(2009-01-09)
-
Interfacing LVDS devices to QuickLogic Eclipse and Eclipse-II FPGAs
(2008-11-11)
-
Clock networks in the PolarPro devices
(2008-11-10)
-
Minimizing energy consumption with very low power mode in PolarPro FPGAs
(2008-11-10)
-
Implementing a White LED (WLED) Controller on an IGLOO FPGA
(2008-10-31)
-
Implementing a Tone Generator on an IGLOO FPGA
(2008-10-30)
-
Implementing a Stepper Motor Controller on an IGLOO FPGA
(2008-10-29)
-
Implementing an LED (RGB) Controller on an IGLOO FPGA
(2008-10-28)
-
Physical interface to QDRII memories using Actel ProASIC 3E FPGAS
(2008-10-22)
-
Migrating designs from A3P250 to lower-logic-density devices
(2008-10-21)
-
ECU and DSP function
(2008-10-20)
-
Power-Up/-Down Behavior of Low-Power Flash Devices
(2008-10-17)
-
Implementing a Keypad Controller on an IGLOO FPGA
(2008-10-16)
-
Power-Up/Down of Fusion FPGAs
(2008-10-16)
-
Programming Flash Devices
(2008-10-15)
-
High-Volume Flash Programming Guidelines
(2008-10-14)
-
Using fusion for closed-loop power supply margining
(2008-10-08)
-
Designing for performance on flash-based FPGAs
(2008-10-08)
-
Temperature, voltage, and current calibration in Fusion FPGAs
(2008-10-06)
-
Metastability characterization report for Actel flash FPGAs
(2008-10-06)
-
Using EDAC RAM for RadTolerant RTAX-S/SL and Axcelerator FPGAs
(2008-10-06)
-
Programming external flash memory on CoreMP7-based development boards
(2008-10-06)
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