Application Notes (Sorted By Date)
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Extended Spartan-3A family overview
(2008-09-11)
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CPLD timing
(2008-09-05)
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Powering CoolRunner-II CPLDs
(2008-07-25)
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Managing power in FPGAs and other devices using CoolRunner-II CPLDs
(2008-07-25)
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XPLA3 I/O cell characteristics
(2008-07-24)
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Using a Xilinx CoolRunner-II CPLD as a data stream switch
(2008-07-24)
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Xilinx in-system programming using an embedded microcontroller
(2008-06-09)
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Eliminating I/O coupling effects when interfacing large-swing single-ended signals to user I/O pins on Spartan-3 Generation FPGAs
(2008-05-26)
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Spartan-3A DSP S3D1800A starter platform features and functions
(2008-05-26)
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Custom PCI timing budgets for Spartan-3 generation FPGAs
(2008-05-26)
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Powering and configuring Spartan-3 Generation FPGAs in compliant PCI applications
(2008-05-26)
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Spartan-3A DSP FPGA Video Starter Kit
(2008-05-26)
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Quartz crystal oscillator implementation with PolarPro and Eclipse II
(2008-05-23)
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Interfacing LVPECL devices to QuickLogic Eclipse and Eclipse-II FPGAs
(2008-05-22)
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Micron ECC module for NAND flash via Xilinx Spartan-3 FPGA
(2008-05-13)
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LM1771 and LM3880 based FPGA power supply reference design
(2008-03-17)
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Powering FPGAs using LM201xx PowerWise synchronous buck regulators
(2008-02-08)
- Designing home appliances with FPGAs (2007-07-17)
- Designing and using FPGAs for double-precision floating-point math (2007-07-16)
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High-speed ADC THS1041and FPGA interface considerations
(2007-05-04)
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Using the OPB EPC with the SMSC LAN 91C111 controller
(2007-04-16)
- 1:7 Deserialization in Spartan-3E FPGAs at speeds up to 666Mbps (2007-03-12)
- Four- and six-layer, high-speed PCB design for the Spartan-3E FT256 BGA package (2007-03-12)
- J drive: In-system programming of IEEE standard 1532 devices (2007-03-12)
- DDR SDRAM controller using Virtex-4 FPGAs (2007-03-12)
- Synthesizable CIO DDR RLDRAM II controller for Virtex-4 FPGAs (2007-03-12)
- Xilinx video over IP solutions for Virtex-4 devices (2007-03-12)
- Dual DIMM DDR2 SDRAM memory interface design guidelines (2007-03-05)
- Stratix III power management design guide (2007-03-05)
- Design guidelines for implementing DDR and DDR2 SDRAM interfaces in Stratix III devices (2007-03-05)
- A flexible architecture to drive sharp two-way viewing angle and standard LCDs (2007-03-05)
- Integrating uplink desubchannelization and ranging modules for WiMAX (2007-03-05)
- Downlink subchannelization for WiMAX (2007-03-05)
- Uplink desubchannelization for WiMAX (2007-03-05)
- Design guidelines for implementing external memory interfaces in Stratix II and Stratix II GX devices (2007-03-05)
- Configuring Xilinx FPGAs with SPI serial flash (2007-02-05)
- 0.18µm flash memory reprogramming in user boot mode (2007-02-05)
- Rewriting flash memory in user program mode using asynchronous serial communication (2007-02-05)
- Xilinx FPGA IFF copy protection with 1-Wire SHA-1 secure memories (2006-12-01)
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JJ-20.11-compatible interface for the DS2155 and DS21455 SCTs
(2006-06-02)
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Power management controller for mixed-voltage FPGA based systems
(2006-06-02)
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Tips for successful power-up of today's high-performance FPGAs
(2005-06-10)
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Precision current source is software-programmable
(2005-06-07)
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Creating high-speed memory interfaces with Virtex-II and Virtex-II Pro FPGAs
(2004-12-10)
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FPGA interface to the TMSC6000 DSP platform using EMIF
(2004-12-10)
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Memory interface application notes overview
(2004-12-10)
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Configuring Xilinx FPGAs with SPI flash memories using CoolRunner-II CPLDs
(2004-12-10)
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Connecting Xilinx FPGAs to Texas Instruments ADS527x series ADCs
(2004-12-10)
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Reading user data from configuration PROMs
(2004-12-10)
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RocketIO X transceiver clock mode switcher for Virtex-II Pro X FPGAs
(2004-12-10)
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