Programmable Logic: [Programmable Logic/Application Notes][Page 4] News, Tech Articles, App Notes

Bits and Bytes

High-density FPGA handles 40G/100G apps
Altera Corp. has begun shipping what it claims to be the highest density, highest system-bandwidth FPGA to address the stringent demands of today's bandwidth-heavy applications.

Application Notes (Sorted By Date)

Memory interface application notes overview (2004-12-10)
Configuring Xilinx FPGAs with SPI flash memories using CoolRunner-II CPLDs (2004-12-10)
Connecting Xilinx FPGAs to Texas Instruments ADS527x series ADCs (2004-12-10)
Reading user data from configuration PROMs (2004-12-10)
RocketIO X transceiver clock mode switcher for Virtex-II Pro X FPGAs (2004-12-10)

High-speed clock architecture for DDR designs using local inversion (2004-12-10)
PPC405 lockstep system on ML310 (2004-12-09)
Statistical profiler for embedded IBM PowerPC (2004-12-09)
Web server reference design using a PowerPC-based embedded system (2004-12-09)
SPI-4.2 to quad SPI-3 bridge (2004-12-09)

Implementing barrel shifters using multipliers (2004-12-09)
Analog devices TigerSHARC link (2004-12-09)
Clock and data recovery with coded data streams (2004-12-09)
Data Recovery (2004-12-09)
PCI bus target controller implementation using a Lattice CPLD (2003-12-20)

ORCA Series 4 I/O User's Guide (2002-12-11)
ORCA Series 3 FPGAs Programmable I/O Cell (PIC): Logic, Clocking, Routing, and External Device Interface (2002-12-11)
Boundary Scan Testability with Lattice's sysIO Capability (2002-12-11)
Supplemental Logic and Interconnect Cell (SLIC) ORCA Series 3 FGPAs (2002-12-06)
ORCA Series 4 Clocking Strategies (2002-12-06)

Metastability in MACH Devices (2002-12-06)
Benefits and advantages of SpeedLocking (2002-12-06)
ispLever starter kit (2002-12-06)
ORCA series 3 programmable clock manager (PCM) (2002-12-06)
ORCA series 3 to series 4 FPGA design conversion (2002-12-06)

ispLSI 5384VE application: High speed binary counter (2002-12-06)
The Pythagoras processor (2002-12-05)
Using the NJ88C33 PLL synthesizer (2002-12-04)
ORCA Series 4 FPGA PLL Elements (2002-11-20)
High Density PLD Solutions for High Speed RISC/CISC Systems (2002-11-08)

Lattice ispLSI5000VA, aspMACH4A3, and MAX7000B Performance Comparison (2002-11-08)
24-Bit Adder Implementation in a CPLD (2002-11-08)
Using the ispPAC30 to Monitor Die Temperature in the ORCA-4 and FPSC ICs (2002-10-17)
ispLSI 8000V Family VHDL Code Examples (2002-10-11)
ORCA series 3 microprocessor interface (2002-09-05)

Copying PAL EPLD and PEEL patterns into GAL devices (2002-09-05)
Configuration quick start guidelines (2002-06-28)
Using a microprocessor to configure Xilinx FPGAs via slave serial or selectMAP mode (2002-06-28)
XC1700 and XC18V00 design migration considerations (2002-06-28)
Virtex-II Pro 3.3V PCI reference design (2002-06-28)

Two flows for partial reconfiguration: Module based or small bit manipulations (2002-06-28)
A quick JTAG ISP checklist (2002-06-28)
Debugging designs using Clear Logic models (2002-06-12)
LIBERATOR: System configuration and initialization (2002-06-12)
CL10K technology white paper (2002-06-12)

Clear Logic LIBERATOR design models (2002-06-12)
OXAN 5: Software examples for the OX16C95x products (2002-03-01)
Basic Stamp II application notes: Phoneline interface (2002-03-01)
Protecting your copy of PC208W and its configuration files (2002-02-25)
Logic buffered delay modules (2001-06-15)

366 Records, Total 8 Page, The 4 Page

Article review

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