Application Notes (Sorted By Date)
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ECLinPS circuit performance at non-standard VIH levels
(2000-12-06)
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Designing with PECL (ECL At +5.0V): The high-speed solution for the CMOS/TTL designer
(2000-12-06)
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ECL clock distribution techniques
(2000-12-06)
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Pericom FCT logic for hot-plug applications
(2000-11-29)
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PI74FCT162344T for heavy load applications
(2000-11-28)
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Quiet FCT logic advantages: Replacement for ABT logic
(2000-11-28)
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FCT vs. ABT logic comparison
(2000-11-28)
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Advanced low-voltage CMOS with bus hold (ALVCH) 3.3V logic
(2000-11-27)
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Pericom ALVCH16244 comparison
(2000-11-27)
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Symmetrical 32-tap FIR filter Macro (FIR32S)
(2000-09-06)
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Symmetrical 24-tap FIR filter Macro (FIR24S)
(2000-09-06)
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OrCAD support for Atmel PLDs
(2000-09-06)
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Second-order IIR digital filter Macro (IIR)
(2000-09-06)
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Using the ATF1500/A CPLD
(2000-09-06)
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FPGA-based FIR filter using bit-serial digital signal processing
(2000-09-06)
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IEEE 1149.1-1990 standard test access port and boundary-scan
(2000-09-05)
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Standard 8-tap FIR filter Macro (FIR8)
(2000-09-05)
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16-word by 8-bit FIFO
(2000-09-05)
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Testing non-windowed OTP PLDs
(2000-09-05)
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Using programmable logic devices
(2000-09-05)
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Using the programmable polarity control
(2000-09-05)
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Programming cascaded configurators
(2000-09-05)
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Symmetrical 8-tap FIR filter Macro (FIR8S)
(2000-09-05)
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Edge detection in AT6000 FPGAs
(2000-09-05)
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Atmel PLD frequently asked questions
(2000-09-05)
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Implementing Cache Logic with FPGAs
(2000-09-05)
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Symmetrical 16-Tap FIR filter Macro (FIR16S)
(2000-09-05)
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ATF1500AS product family conversion application note
(2000-09-05)
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CPLD design hints for Atmel-Synario
(2000-09-05)
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16-bit four-to-one multiplexer with 15ns delay
(2000-09-01)
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24-bit magnitude comparator with 50ns response
(2000-09-01)
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Ripple-carry adders
(2000-09-01)
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16-bit carry-select adder
(2000-09-01)
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Recommended design methods
(2000-09-01)
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Data acquisition systems using cache logic FPGAs
(2000-09-01)
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Digital frequency/Phase comparator (DFPC)
(2000-09-01)
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16-bit up/down counter/shift register
(2000-09-01)
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Using the ATV2500 and ATV2500B
(2000-09-01)
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Barrel shifter
(2000-09-01)
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8-bit, S-P/P-S "corner-bender" data converter
(2000-09-01)
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Compact, loadable 16- and 32-bit binary counters
(2000-09-01)
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High-speed, loadable 16-bit binary counter
(2000-09-01)
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Atmel PLDs' architectures simplify timing calculation
(2000-08-31)
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Controlling FPGA configuration with a Flash-based microcontroller
(2000-08-28)
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Design methodologies for core-based FPGA designs
(2000-06-29)
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XC9500 CPLD power sequencing
(2000-06-29)
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Status and control semaphore registers using partial reconfiguration
(2000-06-29)
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Adapting ASIC Designs for Use with Spartan FPGAs
(2000-06-29)
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XC9500 remote field upgrade
(2000-06-29)
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The Tagalyzer—A JTAG boundary scan debug tool
(2000-06-29)
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