Application Notes (Sorted By Date)
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Configuring Delta39K/Quantum38K
(2001-03-21)
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Understanding bus-hold: A feature of Cypress CPLDs
(2001-03-21)
-
FIFO Dipstick using Warp2 VHDL and the CY7C371
(2001-03-21)
-
ISR programming using an embedded processor with Jam
(2001-03-21)
-
Efficient arithmetic designs with Cypress CPLDs
(2001-03-21)
-
ECL outputs
(2001-03-20)
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The FLASH370i family of CPLDs and designing with Warp2
(2001-03-19)
-
Designing with the CY7C335 and Warp2 VHDL compiler
(2001-03-19)
-
FLASH370i 5V to 12V dc-dc converter solutions
(2001-03-19)
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CPLD power consumption comparison
(2001-03-19)
-
Converting designs from FLASH370i to Ultra37000 devices
(2001-03-19)
-
An introduction to in-system reprogramming (ISR) with the Ultra37000
(2001-03-19)
-
Battery-powered 5MHz frequency counter
(2000-12-12)
-
An MSI 500MHz frequency counter using MECL and MTTL
(2000-12-12)
-
NBCD sign and magnitude adder/subtracter
(2000-12-12)
-
Understanding MECL 10,000 DC and AC data sheet specifications
(2000-12-12)
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Interfacing with MECL 10,000 Integrated Circuits
(2000-12-11)
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Bussing with MECL 10,000 Integrated Circuits
(2000-12-11)
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ECLinPS, ECLinPS lite and ECLinPS plus device type and date code marking guide
(2000-12-11)
-
EPT SPICE modeling kit
(2000-12-08)
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The ECL translator guide
(2000-12-08)
-
ECLinPS Lite MC100LVELT22 SPICE model kit
(2000-12-08)
-
H124, 125, 350-352 translator I/O SPICE modeling kit
(2000-12-07)
-
Board and interface design for AutoBahn Spanceiver (MC100SX1451FI50/100)
(2000-12-07)
-
ECLinPS lite translator ELT family Spice I/O model kit
(2000-12-07)
-
MECL 10H SPICE kit for Berkeley SPICE (PSPICE)
(2000-12-07)
-
Interfacing between LVDS and ECL
(2000-12-06)
-
Metastability and the ECLinPS family
(2000-12-06)
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ECLinPS I/O SPICE modeling kit
(2000-12-06)
-
ECLinPS circuit performance at non-standard VIH levels
(2000-12-06)
-
Designing with PECL (ECL At +5.0V): The high-speed solution for the CMOS/TTL designer
(2000-12-06)
-
ECL clock distribution techniques
(2000-12-06)
-
Pericom FCT logic for hot-plug applications
(2000-11-29)
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PI74FCT162344T for heavy load applications
(2000-11-28)
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Quiet FCT logic advantages: Replacement for ABT logic
(2000-11-28)
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FCT vs. ABT logic comparison
(2000-11-28)
-
Advanced low-voltage CMOS with bus hold (ALVCH) 3.3V logic
(2000-11-27)
-
Pericom ALVCH16244 comparison
(2000-11-27)
-
OrCAD support for Atmel PLDs
(2000-09-06)
-
FPGA-based FIR filter using bit-serial digital signal processing
(2000-09-06)
-
Second-order IIR digital filter Macro (IIR)
(2000-09-06)
-
Symmetrical 32-tap FIR filter Macro (FIR32S)
(2000-09-06)
-
Symmetrical 24-tap FIR filter Macro (FIR24S)
(2000-09-06)
-
Using the ATF1500/A CPLD
(2000-09-06)
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Symmetrical 8-tap FIR filter Macro (FIR8S)
(2000-09-05)
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IEEE 1149.1-1990 standard test access port and boundary-scan
(2000-09-05)
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Edge detection in AT6000 FPGAs
(2000-09-05)
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Programming cascaded configurators
(2000-09-05)
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16-word by 8-bit FIFO
(2000-09-05)
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Implementing Cache Logic with FPGAs
(2000-09-05)
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