Application Notes (Sorted By Date)
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Symmetrical 16-Tap FIR filter Macro (FIR16S)
(2000-09-05)
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Standard 8-tap FIR filter Macro (FIR8)
(2000-09-05)
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Atmel PLD frequently asked questions
(2000-09-05)
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ATF1500AS product family conversion application note
(2000-09-05)
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Testing non-windowed OTP PLDs
(2000-09-05)
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Using programmable logic devices
(2000-09-05)
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Using the programmable polarity control
(2000-09-05)
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CPLD design hints for Atmel-Synario
(2000-09-05)
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Data acquisition systems using cache logic FPGAs
(2000-09-01)
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8-bit, S-P/P-S "corner-bender" data converter
(2000-09-01)
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Digital frequency/Phase comparator (DFPC)
(2000-09-01)
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16-bit four-to-one multiplexer with 15ns delay
(2000-09-01)
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24-bit magnitude comparator with 50ns response
(2000-09-01)
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Barrel shifter
(2000-09-01)
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Ripple-carry adders
(2000-09-01)
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16-bit carry-select adder
(2000-09-01)
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16-bit up/down counter/shift register
(2000-09-01)
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Compact, loadable 16- and 32-bit binary counters
(2000-09-01)
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High-speed, loadable 16-bit binary counter
(2000-09-01)
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Recommended design methods
(2000-09-01)
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Using the ATV2500 and ATV2500B
(2000-09-01)
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Atmel PLDs' architectures simplify timing calculation
(2000-08-31)
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Controlling FPGA configuration with a Flash-based microcontroller
(2000-08-28)
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Design methodologies for core-based FPGA designs
(2000-06-29)
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XC9500 remote field upgrade
(2000-06-29)
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The Tagalyzer—A JTAG boundary scan debug tool
(2000-06-29)
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Status and control semaphore registers using partial reconfiguration
(2000-06-29)
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A Quick JTAG ISP checklist
(2000-06-29)
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Designing with XC9500XL CPLDs
(2000-06-29)
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Adapting ASIC Designs for Use with Spartan FPGAs
(2000-06-29)
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XC9500 CPLD power sequencing
(2000-06-29)
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Dynamic reconfiguration
(2000-06-28)
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Using the XC9500 timing model
(2000-06-28)
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Metastability Considerations
(2000-06-28)
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Pin preassigning with XC9500 CPLDs
(2000-06-28)
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Choosing a Xilinx product family
(2000-06-28)
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XC9536 ISP demo board
(2000-06-28)
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Understanding XC9500XL CPLD power
(2000-06-28)
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XC3000 series technical information
(2000-06-28)
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XC9500 design optimization
(2000-06-28)
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Designing with XC9500 CPLDs
(2000-06-28)
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FPGA configuration guidelines
(2000-06-27)
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Multiplexers and barrel shifters in XC3000/XC3100
(2000-06-27)
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Xilinx FPGAs: A technical overview for the first-time user
(2000-06-27)
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Design migration from XC4000 to XC4000E
(2000-06-26)
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Pulse-width modulation in Xilinx programmable logic
(2000-06-26)
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Configuring FPGAs over a processor bus
(2000-06-26)
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In-system programming times for XC9500XL
(2000-06-26)
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Complex Digital Waveform Generator
(2000-06-26)
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Harmonic Frequency Synthesizer and FSK Modulator
(2000-06-26)
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