EDA/IC Design: [EDA/Technical Archives][Page 3] News, Technical Archives, App Notes

Market Watch

Outsourced IC design growth slowed 20% in '08
2009 will be a make or break year for chip design service providers after the recession slowed the growth of outsourced chip design starts last year, according to a survey by Gartner Inc.

Technical Archives (Sorted By Date)

Trends, challenges in systems design (2005-06-16)
SystemVerilog enhances assertion-based verification (2005-06-16)
Design and verification with Cadence's Virtuoso AMS Designer (2005-06-01)
Leakage power at 90nm and below (2005-06-01)
Application engine synthesis offers new design approach (2005-06-01)

Across the flow: DFM's many faces (2005-05-16)
IC Design House Survey 2005: South Korea (2005-05-10)
IC Design House Survey 2005: Taiwan (2005-05-10)
IC Design House Survey 2005: mainland China (2005-05-10)
Tackling physical verification below 90nm (2005-05-02)

Universal Amplifiers (2005-04-04)
Modeling for HW-dependent SW systems (2005-04-01)
Lower costs through design tool performance (2005-03-16)
Transaction-based simulation using SystemC/SCV (2005-03-16)
Acoustic micro imaging of internal interfaces in a stacked die package (2005-03-16)

Physical synthesis in structured ASICs (2005-03-01)
Reduce costs in automotive power systems (2005-02-16)
Latency analysis of major chip-to-chip interconnects (2005-02-16)
Implement message-driven testbench for FPGAs (2004-12-16)
2004 Design Trends and EDA Tools (2004-10-07)

Signal integrity issues rise with 500Mbps rates (2004-09-01)
Timing closure: Hybrid optimization to the rescue (2004-08-16)
Physical design flow taps partition layout (2004-08-02)
Measuring impedance in disk drive circuits (2004-08-02)
Handling a storm of packaging defects (2004-07-01)

Co-design methodology for system interconnect (2004-05-17)
ALF language lets designers control libraries (2004-05-17)
Transaction-based method supports co-verification (2004-04-01)
Precision jetting allows closer component placement (2004-03-16)
Power grid analysis on IR drop and electromigration (2004-02-16)

Choosing the right design flow model with integrated architecture (2004-02-02)
Write your own PCB design rule checker (2004-02-02)
Signal integrity in multi-Gigabit PCB design (2003-10-16)
Design Trends and EDA Tools: China & Taiwan (2003-09-18)
Identifying front-end challenges for 90nm design (2003-09-01)

Using automatic Emscan in high-speed PCB design (2003-09-01)
Interoperable tools ease equivalence checking (2003-08-18)
Eliminating the problems of dual physical verification (2003-05-02)
Board-to-board optical interconnects using 2D VCSEL and microlens (2003-05-02)
Vendors must support IP reuse in SoC (2003-04-16)

Creating optical devices by nano-machining (2003-02-03)
Simulation tools converge on large RFICs (2002-08-01)
Software friendly hardware for embedded systems (2002-07-01)
Physical design implementation: Challenges and solutions (2002-05-16)
FPGA clock trees and their efficient use (2002-04-08)

Matrix approach for on-chip interconnect (2002-04-01)
'Divide and conquer' with hierarchical design (2002-03-16)
Mastering full-custom layout design (2002-02-16)
Assertion methodologies for Verilog design (2002-01-16)
Articulating hierarchical design for SoCs (2002-01-01)

262 Records, Total 6 Page, The 3 Page

Article review

1 • 2 • 3 • 4 • 5 • 6

Highly Recommended Application Notes

•	Powering Low-Power RF Products (2009-09-22)
•	MPC5566 to MPC5674F Migration Guide (2009-09-03)
•	LatticeSC sysCLOCK PLL/DLL User’s Guide (2009-08-28)
•	LPC2000 secondary bootloader for code update using IAP (2009-07-28)
•	MPC8572E PowerQUICC III Bring-Up Guide (2009-07-13)

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