EDA/IC Design: [EDA/Technical Archives][Page 4] News, Technical Archives, App Notes

Market Watch

Outsourced IC design growth slowed 20% in '08
2009 will be a make or break year for chip design service providers after the recession slowed the growth of outsourced chip design starts last year, according to a survey by Gartner Inc.

Technical Archives (Sorted By Date)

Mastering signal integrity fundamentals (2001-12-16)
The work flow of a block-based design team (2001-12-01)
Implementing OLA to remove delays (2001-12-01)
Equivalence checking for SoC blocks (2001-11-16)
A novel SBU dielectric and coating system (2001-11-01)

Flexible methodologies speed system-level design (2001-10-16)
Design Trends and EDA Tools: Taiwan (2001-10-02)
New developments in place-and-route (2001-10-01)
Attending to signal integrity in complex designs (2001-10-01)
Reducing power, area in cell-based designs (2001-10-01)

Riding the new roller coaters (2001-09-01)
The ramifications of component selection (2001-08-16)
Contactless smartcard design using the EM simulation software (2001-08-09)
Synthesize SoCs using C-based design flow (2001-08-01)
The finer points of autorouting (2001-07-16)

Validate EMC design rules with 3D simulation (2001-07-16)
Establishing design trade-offs for DFM (2001-07-01)
Dimensioning and tolerancing (2001-07-01)
DFM guidelines for through-hole technology (2001-07-01)
Solution space analysis for high-speed design (2001-06-22)

Two mysteries of PCB thermal analysis (2001-06-16)
Co-verification speeded up for design (2001-06-16)
3D design tools for package flexibility (2001-06-08)
HDI and microvia design for high-performance (2001-06-08)
Stimulating entrepreneurial spirit in Japan (2001-06-01)

Academia, IC vendors ally for R&D in Japan (2001-06-01)
Extraction method verifies IP functions (2001-06-01)
Fitting last year's IP to today's processes (2001-06-01)
Scripts bind EDA tools (2001-06-01)
Board tools unite for enhancements (2001-06-01)

Sequence Design offers tool for timing closure (2001-05-16)
U.S.-based Indian engineers head home (2001-05-16)
Syntax raises RTL abstraction level (2001-05-16)
Moving data across asynchronous clock boundaries (2001-05-08)
Cadence, Agere tool would foster IC co-design (2001-05-01)

The need for an EDA API (2001-05-01)
Cadence's 'all-in-one' tool gets skeptic reviews (2001-05-01)
Vendors should count silicon, not tapeout wins (2001-05-01)
HAL levels the playing field (2001-05-01)
Selecting a microvia process (2001-05-01)

Modular component design reuse (2001-05-01)
Putting automated libraries into the flow (2001-05-01)
Timing analysis tools greatly impacts a successful design (2001-05-01)
Taiwan takes stocks (2001-04-15)
Emulation or prototyping for silicon success? (2001-04-15)

Process design kits take aim at custom ICs (2001-04-15)
Speed enhancements for Model Tech upgrades (2001-04-15)
Verification firm starts partners program (2001-04-15)
Ikos lawsuit against Axis turns more complex (2001-04-15)
Protel upgrades P-CAD package (2001-04-15)

262 Records, Total 6 Page, The 4 Page

Article review

1 • 2 • 3 • 4 • 5 • 6

Highly Recommended Application Notes

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•	LPC2000 secondary bootloader for code update using IAP (2009-07-28)
•	MPC8572E PowerQUICC III Bring-Up Guide (2009-07-13)

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