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Application Notes (Sorted By Date)
-
Specctra V8.00 node locked installation for Windows 98
(2001-05-30)
-
Specctra 8.0 installation troubleshooting guide
(2001-05-30)
-
Specctra V8.00 node locked installation for Windows 95
(2001-05-30)
-
Task swapping graphic problem in Windows
(2001-05-30)
-
Running ECO forward annotation from the command line
(2001-05-30)
-
Specctra V8.00 node locked installation for Windows NT 4.0
(2001-05-30)
-
Using RS-274X format
(2001-05-30)
-
Running two different versions of Master Designer on the same computer
(2001-05-30)
-
Printing padstack information on a Unix station using query/padstack
(2001-05-30)
-
Using custom solder dots in schematic
(2001-05-30)
-
Reverse image film for power planes in P-CAD
(2001-05-30)
-
PDIF file reader not creating attributes
(2001-05-30)
-
Using page connectors
(2001-05-30)
-
Importing OrCAD schematic netlist into P-CAD.doc
(2001-05-30)
-
How to make padstacks flip with SMD parts
(2001-05-30)
-
Updating value fields in a schematic design
(2001-05-29)
-
Barebone configuration files to run P-CAD
(2001-05-29)
-
SPECCTRA V9.0 node locked installation for Windows
(2001-05-29)
-
Generating return stringers
(2001-05-29)
-
The exception file in PDIF file reader
(2001-05-29)
-
Deleting layers using PDIF and block save
(2001-05-29)
-
Database version and master designer version
(2001-05-29)
-
Creating an edge connector as a through-hole part
(2001-05-29)
-
Creating non-homogeneous parts and symbols
(2001-05-29)
-
Creating an external aperture file using an internal aperture file
(2001-05-29)
-
Creating mounting holes
(2001-05-29)
-
Component pin code convention
(2001-05-29)
-
How to clear Flash
(2001-05-29)
-
Hierarchical hints
(2001-05-28)
-
Performing engineering change orders (ECOs)
(2001-05-28)
-
Loading control characters in ACCEL EDA
(2001-05-28)
-
One pin representation to multiple pads
(2001-05-28)
-
ACCEL-To-SPECCTRA interface and design language translation
(2001-05-28)
-
Importing text from a file into ACCEL SCH or PCB
(2001-05-28)
-
Removing ERC and DRC error indicators
(2001-05-28)
-
Library creation from ACCEL ASCII netlist
(2001-05-28)
-
Displaying alternate views of a symbol
(2001-05-28)
-
Storing a view
(2001-05-28)
-
Using and understanding ports
(2001-05-28)
-
Adding pins to an existing part file using PDIF
(2001-05-28)
-
Using PrimeTime in LSI Logic's FlexStream design flow
(2001-05-24)
-
Using formality in LSI Logic's FlexStream design flow
(2001-05-24)
-
Using formality for RTL-to-gate in LSI Logic's FlexStream design flow
(2001-05-24)
-
Using Multibit register inference to save area and power
(2001-05-24)
-
An introduction to the PLL library
(2001-04-26)
-
Oscillator noise analysis in SpectreRF
(2001-04-26)
-
Accurate Fourier analysis for circuit simulators
(2001-04-26)
-
Modeling and application of bonding pads
(2001-04-26)
-
Periodic s-parameter and noise analysis using SpectreRF PSP/PNOISE analyses
(2001-04-26)
-
How to simulate RTL designs with LSS memory
(2001-04-25)
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