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Bits and bytes
New Products (Sorted By Date)
- Agilent analysis probe allows design, debug operations (2004-01-26)
- 64-bit Linux speeds IC design tool (2004-01-19)
- Cypress releases IDE for PSoC mixed-signal array (2004-01-16)
- 'Obfuscators' render Verilog, VHDL unreadable (2004-01-16)
- K&S ball bonder offers 10 percent UPH improvement (2004-01-14)
- Tanner adds design tool (2004-01-14)
- C-based co-development environment rolls for FPGAs (2004-01-14)
- Jinling multilayer PCBs offer 220-by-150mm board size (2004-01-13)
- NI TestStand 3.0 integrates with TYX PAWS Atlas TPS (2004-01-08)
- Transaction-level emulation platform rolls out (2004-01-08)
- EDA startup offers graphical Verilog tool (2004-01-05)
- Magma chip has built-in timing analysis engines (2003-12-31)
- Pentek board features Motorola processor (2003-12-30)
- TI preamplifier IC eyes audio apps (2003-12-26)
- Greek EDA startup offers RF design tool (2003-12-26)
- Tool promises parallelizing synthesis (2003-12-23)
- Atmel FLIP adds increased functionality, power (2003-12-22)
- Tanner upgrades layout editor (2003-12-19)
- Xilinx platform accelerates FPGA-based DSP design (2003-12-18)
- Aptix releases prototyping system for block and IP designers (2003-12-18)
- 0-In Design tacks on static verification capability (2003-12-17)
- Kawasaki launches hi-speed certified macro (2003-12-15)
- CML kit brings speed to PMR, Leisure-Radio ICs (2003-12-10)
- Tool set eyes process test-chip design (2003-12-10)
- Software yields graphical 'views' from HDL code (2003-12-10)
- Mentor get "physical" with FPGA synthesis (2003-12-08)
- Cadence streamlines PCB design flow (2003-12-05)
- Ansoft releases Service Pack 4 for Simplorer (2003-12-02)
- Jingwei PCB offers 0.0762mm line width (2003-11-25)
- China Circuit Tech PCB features 1mm thickness (2003-11-25)
- Translogic HDL Companion targets complex designs (2003-11-25)
- Speedline system eliminates tooling maintenance (2003-11-20)
- Agilent brings full-wave modeling to Virtuoso (2003-11-17)
- Cadence tool tackles signal integrity issues (2003-11-14)
- New verification platform is based on Jeda language (2003-11-13)
- 0-In assertion compiler has multilingual features (2003-11-13)
- SystemC tool 'automates' ESL-to-RTL design flow (2003-11-11)
- Formal tool adds hierarchical PSL support (2003-11-10)
- Aldec, Celoxica offer C-based FPGA design (2003-11-07)
- Monterey upgrades IC implementation toolset (2003-11-07)
- Faraday SoC platform accelerates ASIC designs (2003-11-04)
- Formal tool verifies Amba bus protocol (2003-11-03)
- AIC boards incorporate cable-to-board connectors (2003-10-31)
- Mentor launches 'scalable' verification platform (2003-10-29)
- GDA rolls out design kit for Intel processors (2003-10-23)
- ARM extends RealView solution (2003-10-21)
- Aldec upgrades dual language simulation environment (2003-10-21)
- Tanner unveils schematic tool (2003-10-20)
- Gidel board suits high-density systems (2003-10-20)
- Anadigm software features improved simulation (2003-10-17)
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