|
|||||||||
|
|||||||||
|
|||||||||
Bits and bytes
News & Trends (Sorted By Date)
- Cadence acquires process migration provider Q Design (2004-01-07)
- Sequence wins power, inductance patents (2004-01-06)
- STATS forms alliance with SimmTech (2004-01-05)
- Chip manufacturers make smart choice (2004-01-01)
- 3D SoCs perform for future (2004-01-01)
- EDA outlook positive in Asia-Pacific (2004-01-01)
- Asia's chip industry reaches a new trajectory (2004-01-01)
- Verification platform for Jeda language rolls (2004-01-01)
- 0-In assertion compiler is multilingual (2004-01-01)
- Assertion flow debuts (2004-01-01)
- Startups taking over ESL (2004-01-01)
- Startup promises 'algorithm to tapeout' (2004-01-01)
- Magma launches training initiative for India (2003-12-31)
- Analyst report predicts modest EDA recovery (2003-12-29)
- Xilinx, IBM assure of serdes interoperability (2003-12-26)
- AWR to supply RF tools to Taiwan SoC design park (2003-12-26)
- Statistical static timing analysis ensures IC performance (2003-12-26)
- Synopsys invests in accelerator provider Tharas (2003-12-24)
- EDA industry tool sales decline in third quarter (2003-12-22)
- Designers stand up for gate-level simulation (2003-12-19)
- Exec predicts China's fab growth will slow in 2006 (2003-12-16)
- PLLs, DLLs becoming reusable IP (2003-12-16)
- Versity to acquire Axis Systems (2003-12-15)
- NEC ASICS supported by Cadence platform (2003-12-12)
- AMD to co-establish platform development lab in China (2003-12-12)
- Nassda obtains patent for its circuit simulator (2003-12-12)
- Mentor Graphics co-establishes SoC training center in China (2003-12-11)
- Xilinx announces breakthrough in FPGA architecture (2003-12-11)
- Tower Semiconductor standardizes on TriCN interface IP (2003-12-10)
- Link by link, China crafts its industry (2003-12-09)
- SiNett sets up IC design center in Bangalore (2003-12-08)
- Sanmina facility passes U.S. military supplier assessment (2003-12-04)
- Mentor tools enhanced with PCBstandards.com library (2003-12-04)
- FPGA tool startup tackles ASIC prototyping (2003-12-02)
- Cadence to co-develop IC design talent base in China (2003-12-02)
- Verisity plans manager for verification (2003-12-01)
- EDA blooms in Asia (2003-12-01)
- Process tool promises yield optimization (2003-12-01)
- Cadence, China's MOE to build IC design program (2003-11-28)
- Taiwan IC industry posts 35.7 percent growth (2003-11-28)
- Foreign firms open design services shops in China (2003-11-26)
- Monterey Design selected for IC design flow by Mimos (2003-11-21)
- Credence launches COE program (2003-11-21)
- Belling forms 8-inch wafer plant with Zhangjiang Group (2003-11-21)
- OpenAccess database moves into IC design environments (2003-11-21)
- Program introduced to simplify Actel-based designs (2003-11-20)
- FPGA placement performs poorly: ICCAD (2003-11-18)
- Compeq-ASC Group form chip company in Taiwan (2003-11-17)
- The great killer app enigma (2003-11-17)
- FPGA placement performs poorly, study says (2003-11-17)
|
|||||||||||||||
|
|||||||||||||||
 |
Top Ranked Articles
- Wafer-level packaging achieves prominence
- Confab to highlight nanotech for bio
- Comment: Gphones should be more open in net search
- IBM transits to 45nm SOI
- IPO candidates await market recovery
- VC funding for chip firms slows down
- Bozotti cites key points for ST's rehabilitation
- LCD TV design solution achieves 90% efficiency
- Intel to showcase 32nm technology at confab
- GooglePhone responds to Android's aspirations
