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01 August 2008
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News & Analysis
EDA vendors have struggled to meet the challenge of multicore IC design by rolling out multithreading capabilities for their tools. Nonetheless, the question cannot be ignored: Is multithreading the best way to exploit multicore systems effectively?
The choice of MCU vendor is as vital as using MCUs to differentiate products. Ganesh Moorthy, Microchip's executive VP, shares tips on selecting an MCU vendor.
The company reports that it has achieved its anticipated revenue due to steady growth in MCUs, system solutions and power/analog devices.
Recent product launchings and new project initiatives indicate that the Eclipse framework is spilling over from its IT origins to become a dominant factor in the embedded space. The Eclipse Europa CDT Release 4.0 framework, along with GNU C/C++ compilers and debuggers, instruction-set simulators, and a target hardware probe, forms a complete development system.
Altera Corp. today is expected to become the first FPGA vendor to launch a family of 40nm FPGAs. In addition, Altera will announce the 40nm HardCopy IV structured ASICs, as well as corresponding software tools for both device types. The families promise to enable a new class of single-chip, multicore and related complex devices.
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As mobile handset providers include GPS functionality into their phones at more promising levels, attention is turning to the design and drop-in capability of its functions. Although presently much attention has been directed toward GPS DSPs, they are only part of the GPS success story.
Low-power DDR2 (LPDDR2), a next-generation low-power memory technology for mobile and embedded designs being defined by companies participating in JEDEC standards, offers higher speed, lower-voltage operation, larger capacities and lower pin count than the current generation. This lets NVM share the same bus as SDRAM.
DDR2 is still relatively new in the industry. It is an evolutionary improvement over its predecessor, DDR, and is the next memory standard, as defined by Joint Electronic Device Engineering Council document JESD79-2E. It behooves layout designers to completely comprehend the interface before doing layout so that the boards they design will be created "right the first time."
Today's switching regulators and supplies are compact and powerful. However, one of their major trade-offs is higher switching frequency, which makes board design all the more difficult. Board layout more than ever differentiates a good switcher design from a bad one.
With the presence of the design geometries between 1000nm and 1nm, we can start deploying 32nm flows and find the solutions of the transitional barriers between 32nm and 22nm. Design verification plays a vital role in reducing the design cost and improving the yield of the new products and product platforms.
We become emotionally fixated on a certain solution to the exclusion of all others. We could do it right. We could take the time to learn the new tool, the new technique and the new approach. We could do a little planning rather than doing the usual. We could use a little finesse, but we don't. It's too much trouble.
Technical Features
Each object in C and C++ has one of the following three storage durations: static, automatic, and dynamic. While it's nearly impossible to write a useful program without using both static and automatic allocation, programs can—and do—manage to get by without any dynamic allocation. This article looks at the case for and against using dynamic allocation. (PDF file)
This article discusses the technical requirements of future video surveillance systems and the hardware and software changes that are taking place to meet these needs. (PDF file)
RS-485 has emerged as the industry's seemingly eternal interface workhorse. This article serves as an introductory guide to designers new to RS-485 by discussing the main aspects of the standard. (PDF file)
Serial bus technology raised the bar in performance requirements for high-performance test and measurement instruments used in design, validation and troubleshooting. High data rates are only the initial steps. Designers need better tools to support critical SI measurements and eye diagram analysis. (PDF file)
MOST is a networking standard enabling seamless transport of digital audio, video and packet-based data, along with real-time control information, within the car. The latest MOST ICs simplify the network interface by integrating all low-level, real-time network operations, including the network driver, on a single chip. (PDF file)
Opinion
There is never a dull moment in the electronics design world, even in these days of so-called slowdown. And the latest sensation on the wireless design scene is the mobile Internet device.
There is a surge in the number of companies touting mobile Web offerings. But as more feature-rich sites and downloadable applications are offered, the issue of finite mobile bandwidth and resulting deterioration in content download performance rears its head—a true catch-22. Here are mobile application design tips for avoiding this catch.
Interview
Hyperstone's flash memory controllers have evolved to multiple product lines, which include the F2/F3 series that zeroes in on the CF card standard, and the S2/S3/S4/S6/S7 series targeting the SD/MMC card standard. Apart from carrying proprietary 32bit RISC processor core, the products feature hardware units such as the ECC, buffer, flash memory and host interface control logic.
Vital Signs
The optoelectronics market is up for a strong global showing, with potential to reach $31 billion by 2013, according to Databeans.
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