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01 August 2007
News & Analysis
In the face of falling flash memory prices, HDD makers are retreating from what they thought would be new growth markets in mobile consumer systems.

Engineers are forging ahead on two fronts to define lower-power, lower-cost devices that deliver the full capabilities of a desktop PC.

Technology developments announced by Tessera Inc. and Eastman Kodak Co. promise to satisfy consumers' insatiable appetite for smaller-form-factor and higher-performance cameras.

Board and subsystem developers feel that full-sized ATCA may end up being a highly customized boutique business while high-volume manufacturing moves to the smaller MicroTCA standard.

Recognizing that tomorrow's home networks will be a mix of wired and wireless options, the WiMedia Alliance has set up a group to explore whether it should draft a standard for UWB networking over coax cable.

From an industrywide perspective, high-k and metal-gate technologies allow a restart of chip scaling with reduced leakage, higher initial product costs, performance hits and tool changes in the process flow.




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The TPL/TPLS series, used for pulse and hold-up power in handheld and portable devices with MPUs, may be specified for energy storage in a broad range of space-constrained applications.

Freescale Semiconductor Inc. has launched the Com Express development kit to bring PowerQuicc II integrated communications processors into the industrial control space.

The company is moving add-drop multiplexer customers to the optical packet world with a new member of its Flashwave family that combines elements of Sonet, Ethernet and reconfigurable optical ADM.

Akustica Inc. has unveiled a microphone that measures 1mm² and uses a MEMS diaphragm and on-chip complementary CMOS analog circuitry.

IBM Corp. has rolled out its initial ASIC offering based on 45nm technology. The product line is the world's first ASIC that combines embedded DRAM and silicon-on-insulator technologies, according to the company.

When using high-speed FPGAs in a design, it is important to consider several design issues both before and during board development.

This article discusses the disconnect between the digital design engineer's vision of bus structures on the PCB and the failure of tools to capture and route this vision efficiently.

The best DFx flow combines the DFM-aware features in today's synthesis, placement and routing solutions with a post-route interconnect optimization step.

'Less is more' is often tossed around to characterize simple CE product designs. While less may not be more, less is indeed better in many cases.


Technical Features
A consolidated point of presence architecture can make it easier for service providers to create scalable networks that are more highly available, flexible and manageable. (PDF file)

ESL is changing the way designs are done. With a good understanding of software programming, engineers armed with ESL tools are moving design to the next level of productivity. (PDF file)

Digital PLL and DSP-based FM transmitters can overcome the drawbacks one can expect from using conventional architectures by realizing frequency modulation, pre-emphasis, pilot tone and multiplexing in a purely digital domain. (PDF file)

Advancements in DRAM technology have been accompanied by the emergence of multicore processors, new operating systems and increasingly divergent requirements across many different computing platforms and applications. (PDF file)

Combining dynamic voltage and frequency scaling with power gating can reduce energy consumption in circuit operations to help prolong battery life in mobile devices. (PDF file)

System design engineers have to use many capacitors to filter digital noise for a clean voltage source for analog circuits. This article discusses the effect of filter capacitors. (PDF file)

With processors and SDIO peripherals now operating at different interface supply voltages, a level translator has to be added to ensure switching compatibility. System designers now have multiple choices of level translation solutions for controlling the bidirectional flow of data and command signals from processor to card. (PDF file)

A next-gen signal analyzer can improve measurement speed and other factors in the entire product design cycle. Using the same instrument at different stages improves efficiency and hastens time-to-market. (PDF file)

Engineers will run across sensors with characteristics similar to those of a MEMS gyroscope. Here are tips for designing them in an image system with reprogrammable mixed-signal MCUs. (PDF file)



Opinion
Innovation in display technologies is happening at multiple levels of the product development cycle—and Asian engineers are key stakeholders in these undertakings.

As demands on engineers have gotten tougher, teams must learn that the 'work smarter' approach drives productivity and innovation as opposed to 'work harder.'


Interview
Bosch sensor engineering VP Horst Münzel and Bosch Sensortec general manager and CEO Frank Melzer recounted the history of MEMS development at Bosch and shared its plans for the technology in a conversation with EE Times.

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