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16 May 2007
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News & Analysis
The starting gun sounded on the 45nm foundry race when the world's largest foundry service provider announced in April it is accelerating ramp of its 45nm process.
The tools needed to program and debug multicore ICs are in the "dark ages," according to Anant Agarwal. Solutions are emerging, but the dearth of parallel-programming tools and lack of expertise among embedded designers threaten to slow the progress of multicore architectures.
A broad group of chip and systems makers is taking a fresh approach to the long-sought goal of creating a single interconnect to link all systems in the data center. Broadcom, Cisco, IBM, Intel and others are in an early stage with an upgrade tentatively called Convergence Enhanced Ethernet.
IBM scientists have announced a prototype optical-transceiver chipset that transfers data at a rate eight times faster than currently available components.
The "2007 Taiwan IC Design House Survey" revealed a maturing chip design industry that's ready to take on more complex challenges to carve a name for itself in this highly competitive business.
If university professor Dennis Hong's whole-skin locomotion project proves successful, robots will soon ooze toward their goals, sans motors, gears or any conventional mechanisms.
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RTOS and tool providers are aggressively supporting multicore programming and debugging while improving model-driven design, virtual prototyping and C-language compilation.
Renesas plans to offer a complete solution for system houses developing MCUs, Zigbee-based RF chipsets and even single-chip devices for the 900MHz and 2.4GHz bands.
QuickLogic's ArcticLink is an ASSP that can be configured to support several communications and peripheral protocols for handheld systems.
Montage Technology has ramped up a QAM demodulator that integrates a programmable gain amplifier, internal supply regulator and reference generator to reduce external component count.
D2 Technologies' upgraded vPort now supports multiple service protocols and classes of systems, including cellular and cordless phones.
Vivace Semiconductor's multicore DSP will capitalize on the addition of QVGA video to basic MP3 player platforms for the China market.
Automated source code analyzers are good at locating anomalies. They can also be used with little or no impact on build times and are easily integrated with the regular software development environment.
Here are tips that designers and manufacturers can keep in mind when developing embedded systems and devices that capitalize on the digital lifestyle.
Security-conscious homeowners have long been waiting for affordable next-gen networked residential security and monitoring systems.
When undertaking a project that involves an emerging technology such as wireless USB, you face many new problems. Here are points you must consider for wireless USB product development.
Technical Features
Unlike conventional 32bit processors that suffer from performance bottlenecks, programmable processors provide more flexibility than RTL blocks to support multiple video standards. (PDF file)
Development and conformance test requirements for A-GPS-based cellphones, time-to-market pressures and the need for field trials have compelled OEMs to perform in-field testing of cellphones. (PDF file)
This article focuses on the challenges of A/D conversion as they pertain to SDR implementations, and how breakthroughs in ADCs can bring true SDR closer to reality. (PDF file)
Complete SoC solutions will be critical in the development of digital-home applications, as they will provide all of the hooks for integrating with target applications. (PDF file)
Spansion's MirrorBit Quad technology stores two distinct quantities of charge in a non-conducting nitride storage medium to deliver fundamental cost, reliability and manufacturing advantages over floating-gate technology. (PDF file)
FCIC removes ESR constraint for stability, allows the use of a ceramic output capacitor, minimizes the output ripple voltage and makes a COT regulator simpler to use. (PDF file)
Here's a step-by-step guide that should help designers reduce the amount of time required to comply with WEEE and RoHS directives. (PDF file)
Compliance workshops include training sessions on latest PCIe specifications, compliance testing for products, and interoperability testing of PCI products with other member products. (PDF file)
Opinion
Just as power consumption has a cascading effect, from the component level to the application level, so does power-wise design intent, from IC design to systems design.
To create a solution that offers a true enterprise-wide system-level flow, the industry must develop a comprehensive methodology that leverages much of its success in hardware development.
Interview
Chandran Nair, managing director of NI Southeast Asia, talks about how the company has moved from the test and measurement domain to the embedded turf.
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