New Products
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PHY IP solution eases HDMI 1.4 integration (2010-02-01)
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64bit simulator handles larger designs (2010-01-22)
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WLAN ref design enables straightforward board boot (2010-01-05)
- USB audio kit achieves sub-3ms roundtrip latency (2009-11-30)
- Ref design eases high-efficiency LED apps dev't (2009-11-27)
- HD DVR design kit supports hexaplex operation (2009-11-25)
- Software solution enables faster failure analysis (2009-11-23)
- IP core supports Serial RapidIO 2.1 (2009-11-20)
- Low-power IP camera ref design delivers 30fps (2009-11-10)
- 0.11µm 30V process trims costs (2009-10-28)
- IF reference kit eases base station design (2009-10-22)
- Camera processor IP core supports 18MP (2009-10-15)
- Board support package rolls for TI OMAP 3 (2009-10-01)
- Virage expands interface IP solutions for CE (2009-10-01)
- FPGA design software tailored for 40/100G apps (2009-09-24)
News & Trends
- Synopsys expands verification products via CoWare (2010-02-10)
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Karnataka details semiconductor policy (2010-02-09)
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Panel tackles outsourcing tradeoffs (2010-02-08)
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Synopsys takes over VaST Systems (2010-02-05)
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What's in EDA crystal ball? (2010-02-05)
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Hot buttons for 2010: Convergence, green tech (2010-02-04)
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Empyra: Cloud computing to redefine information, process use (2010-02-02)
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ICT favors Rambus over Nvidia (2010-01-28)
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Financial crisis drives innovation in chip market (2010-01-28)
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Does EDA need international roadmap? (2010-01-22)
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Kodak, Samsung ink tech cross license (2010-01-20)
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Kodak files IP claim against Apple, RIM (2010-01-19)
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Parallel language, early verification to drive 2010 success (2010-01-15)
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An EDA company's take on 2010 growth sectors (2010-01-13)
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Industry focuses on core competencies, cutting costs (2010-01-12)
Technical Archives
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Transitioning to next-gen automated design tools
(2010-01-29)
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Solving today's problem of SoC verification
(2010-01-22)
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Targeting small delay defects
(2010-01-13)
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Closing the 'quality gap' in functional verification
(2009-12-08)
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Revised crosstalk-aware routing offers better optimized design
(2009-11-10)
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Improve yield with layout-aware DFT
(2009-10-08)
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Ensure environmental regulation compliance
(2009-08-14)
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Employ advanced logging techniques for SystemVerilog
(2009-04-30)
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Pinout complex FPGAs step-by-step
(2008-12-16)
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Valuing substrate parasitics in RFIC designs
(2008-09-16)
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Automate formal verification for OCP
(2008-09-01)
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Employ fencing for best EMI protection
(2008-07-01)
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New formula to speed up PCB designs
(2008-05-16)
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Sign-off smartly with SSTA
(2008-05-01)
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Reduce EMI with proper SI design
(2008-04-01)
Application Notes
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Writing configuration files for Zilker
(2009-12-04)
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Active filter evaluation board for differential amplifiers
(2009-11-27)
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Linking or selecting scan ports with BSCAN2
(2009-11-13)
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Land grid array (LGA) package rework
(2009-11-10)
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Assembly guidelines for MicroFET-6 packaging
(2009-10-27)
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Assembly guidelines for Dual Power56 Packaging
(2009-10-26)
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DVI ESD protection demonstration board
(2009-10-20)
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OneWireViewer user's guide ver 1.4
(2009-09-29)
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Solder reflow guide for surface mount devices
(2009-06-17)
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Board mounting 0.5A FlipKY
(2009-06-17)
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PCB layout recommendations for BGA packages
(2009-06-16)
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Smart inductive proximity switch
(2009-06-15)
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PAC-POWR1220AT8-EV evaluation board
(2009-06-11)
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Power-up sequencing techniques using iP1201 and iP1202
(2009-06-11)
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LM5073HE evaluation board with active bridge
(2009-06-08)







