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Market Watch
New Products
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IP core supports Serial RapidIO 2.1 (2009-11-20)
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Low-power IP camera ref design delivers 30fps (2009-11-10)
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0.11µm 30V process trims costs (2009-10-28)
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IF reference kit eases base station design (2009-10-22)
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Camera processor IP core supports 18MP (2009-10-15)
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Board support package rolls for TI OMAP 3 (2009-10-01)
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Virage expands interface IP solutions for CE (2009-10-01)
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FPGA design software tailored for 40/100G apps (2009-09-24)
- PSoC platform addresses 8-/16-/32bit apps (2009-09-18)
- Silicon circuit board trumps ASICs (2009-09-02)
- Controller IP supports ultrahigh-speed SD operation (2009-08-31)
- Custom-defined architecture lowers mask fees (2009-08-18)
- CPRI v4.1 IP core supports WiMAX, LTE (2009-08-13)
- AMD OpenCL beta targets CPUs, GPUs (2009-08-12)
- Simulation tool goes online (2009-08-10)
News & Trends
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Analysis: Change is in the wind at SMIC (2009-11-12)
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Freescale, Synopsys extend verification tie-up (2009-10-30)
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Mentor, Aeroconseil partner for China aviation (2009-10-27)
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Cadence, ARM co-develop next-gen SoC design flow (2009-10-23)
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GlobalFoundries taps Mentor EDA tools (2009-10-21)
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Flextronics to build design center in Wuzhong (2009-10-20)
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Mentor acquires CAD software provider (2009-10-15)
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18Mpixel camera phone, anyone? (2009-10-15)
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NREL adopts Synopsys TCAD for solar cells (2009-10-14)
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NXP offloads CMOS IP to Virage Logic (2009-10-14)
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Analysis: Will Tessera's optics venture pay off? (2009-10-14)
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Netbook success could trigger ARM takeover (2009-10-14)
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MIPS wants a slice of handset market (2009-10-09)
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Samsung licenses Apical imaging IP core (2009-10-08)
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Braving software-to-silicon verification challenges at 45nm (2009-10-05)
Technical Archives
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Revised crosstalk-aware routing offers better optimized design
(2009-11-10)
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Improve yield with layout-aware DFT (2009-10-08)
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Ensure environmental regulation compliance (2009-08-14)
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Employ advanced logging techniques for SystemVerilog (2009-04-30)
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Pinout complex FPGAs step-by-step (2008-12-16)
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Valuing substrate parasitics in RFIC designs (2008-09-16)
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Automate formal verification for OCP (2008-09-01)
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Employ fencing for best EMI protection (2008-07-01)
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New formula to speed up PCB designs (2008-05-16)
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Sign-off smartly with SSTA (2008-05-01)
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Reduce EMI with proper SI design (2008-04-01)
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Solving PCIe compliance, interoperability issues (2008-02-01)
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Optimize I/O expansion in workstations (2007-12-17)
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Use time-domain methods to measure crosstalk (2007-11-16)
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Know the essentials in stimulus-response test (2007-11-01)
Application Notes
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Linking or selecting scan ports with BSCAN2 (2009-11-13)
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Land grid array (LGA) package rework (2009-11-10)
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Assembly guidelines for MicroFET-6 packaging (2009-10-27)
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Assembly guidelines for Dual Power56 Packaging (2009-10-26)
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DVI ESD protection demonstration board (2009-10-20)
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OneWireViewer user's guide ver 1.4 (2009-09-29)
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Solder reflow guide for surface mount devices (2009-06-17)
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Board mounting 0.5A FlipKY (2009-06-17)
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PCB layout recommendations for BGA packages (2009-06-16)
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Smart inductive proximity switch (2009-06-15)
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PAC-POWR1220AT8-EV evaluation board (2009-06-11)
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Power-up sequencing techniques using iP1201 and iP1202 (2009-06-11)
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LM5073HE evaluation board with active bridge (2009-06-08)
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Digital isolator design guide (2009-06-08)
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Zener macro-models provide accurate SPICE simulations (2009-06-05)
Resource Center
- [Cypress] Building a Proximity Detector Using PSoC Designer
- [ADI] Keeping Common Modes Common
- [Cypress] CY8C22x45, CY8C21345: PSoC® Programmable System-on-Chip™ Technical Reference Manual (TRM)
- [Avago] Motion Sensing and Control Products
- [ADI] Which carries more weight, a datasheet or SPICE macromodel?
- [ADI] AN-0986 : Adjusting the Output Range and Span of the AD5362
- [NI] Structural Health Monitoring Resources for Structural Engineers
- [Cypress] PSoC The Mixed Signal FPGA Companion Chip
- [Cypress] CY8C201xx : Register Reference Guide
- [Cypress] CyFi from Cypress Takes Winemaking Wireless
Top Ranked Articles
- IP core supports Serial RapidIO 2.1
- Linking or selecting scan ports with BSCAN2
- Analysis: Change is in the wind at SMIC
- Land grid array (LGA) package rework
- Low-power IP camera ref design delivers 30fps
- Revised crosstalk-aware routing offers better optimized design
- Freescale, Synopsys extend verification tie-up
- 0.11µm 30V process trims costs
- Mentor, Aeroconseil partner for China aviation
- Assembly guidelines for MicroFET-6 packaging
