Custom ASICs run towards datacentre finish line
Custom ASICs hold tremendous promise for use in big datacentres, and UC Berkeley Professor David A. Patterson is building a research system to show the way. In his keynote at Hot Interconnects, Patterson introduced a warehouse-scale computer, Firebox, targeted for release in 2020.
As Moore's law slows down, ASICs will get easier and cheaper, Patterson forecasted. It is already talking about three years instead of the usual 18 months to pack twice as many transistors in the same space, and the time span will stretch to more than five years in the future, he said.
The shift in Moore's Law, although painful, will lead to new innovations, he predicted. Nevertheless, "it's scary to think about this giant that's been driving our industry for 50 years will grind to a halt," he said.
Firebox will use 32 vector processors with accelerators, networking and 32GB to 128GB DRAM per cache coherent node.
Since big data centres manage their own software stack, they will find advantages by 2020 in shifting from making their own servers and switches to designing their own ASICs for them, too, he said. As a result cloud computing services are likely to get more powerful while client computers will be challenged to keep up.
Data centre processors should be 2.5D stacks of processors, accelerators, low-latency networking and memory in Patterson's view. Data centres could in hardware enable garbage collection and, like the new Oracle M7, handle software bug checks, he said.
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