Intel delivers 14nm process technology
Intel claims its 14nm process delivers a lower cost per transistor than its 22nm node thanks to aggressive area scaling using self-aligned double-patterning lithography. It said the process will enable a new class of x86-based 2-in-1 tablet/notebooks less than 9mm thick that will be on store shelves before the end of the year.
Intel reserved details of Broadwell products until its annual developer forum in San Francisco next month. But it did give some specs for its 14nm FinFETs. Compared to Intel's 22nm process, it will have:
- 42nm fin pitch, down .70x
- 70nm gate pitch, down .78x
- 52nm interconnect pitch down .65x
- 42nm high fins, up from 34nm
- a 0.0588 micron2 SRAM cell, down .54x
- approximately 0.53 area scaling compared to 22nm
Products using the 14nm process have been delayed nearly a year due to yield problems. "Scaling the gate and fin pitches as aggressively as we have were reasons for yield challenges, but we are in a very healthy range now and will continue to improve," said Mark Bohr, a senior fellow for the company's logic development group.
Mark Bohr holds a 14nm Intel wafer.
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