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Emulator runs pre-silicon verification of memory SoCs

Posted: 10 Jul 2014  Print Version  Bookmark and Share

Keywords:memory  HMC  LPDDR4  eMMC 5.0 

Memory receives tall bandwidth and performance orders, and mobile multimedia devices and advanced networking infrastructure have been raising the bar on such requirements. To address the challenge, Mentor Graphics Corp. released an emulation platform, and created models for emerging memory standards that can be accelerated on the emulator.

Dubbed Veloce2, the platform supports verification of high-performance memory products that use the latest-generation standards including Hybrid Memory Cube (HMC), LPDDR4, and eMMC 5.0. The benefit is derived from the capability to develop and stress test software and hardware with billions of verification cycles before silicon is available.

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Veloce2 enables pre-silicon testing and debug at hardware speeds, using real-world data, while both hardware and software designs are still fluid. Source: Mentor Graphics

HMC is a 3D-DRAM architecture that can deliver memory bandwidths in excess of 100Gbit/s, or 15 times that of DDR3 memories, while consuming 70 per cent less energy/bit than DDR3. This architecture is increasingly used to meet the 100Gbit and higher networking application requirements, and is also targeted for higher GPU and CPU bandwidth needs.

The LPDDR4 and eMMC 5.0 memories, meanwhile, are complementary technologies used in ultra-mobile products, such as tablets, superphones, and ultrabooks where LPDDR4 is used for DRAM, and eMMC 5.0 is used for mass storage. High bandwidth and performance, low power and cost, and a small form factor are key characteristics that make these memory standards attractive for today's SoC designers.

All three models can be used for traditional in-circuit emulation (ICE), virtual lab emulation, and high-performance, transaction-based acceleration. When combined with the Veloce2 emulator, these memory solutions deliver high-performance and easy-to-use IP and system-level verification for SoCs. Moreover, verification engineers can do so in a plug-and-play way, which can never compromise delivery schedules.





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