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2D FET exhibits high electron mobility

Posted: 06 Jun 2014  Print Version  Bookmark and Share

Keywords:2D  transistor  FET 

Lawrence Berkeley National Laboratory (Berkeley Lab) has prototyped a field-effect transistor using heterogeneously stacked 2D materials for all of its components: the semiconductor, insulator, and metal layers.

Touted as the first fully 2D FET, the device suffers no performance drop-off under high voltages and provides high electron mobility, even when scaled to a monolayer in thickness.

FETs, so-called because an electrical signal sent through one electrode creates an electrical current throughout the device, are widely used in electronic devices. All FETs are comprised of gate, source and drain electrodes connected by a channel through which a charge-carrier—either electrons or holes—flow. Mismatches between the crystal structure and atomic lattices of these individual components result in rough surfaces, which degrade charge-carrier mobility especially at high electrical fields.

Ali Javey, Berkeley Lab's Materials Sciences Division faculty scientist and UC Berkeley professor of electrical engineering and computer science, led the research. He and his team fabricated the 2D FET using the transition metal dichalcogenide molybdenum disulphide as the electron-carrying channel, hexagonal boron nitride as the gate insulator, and graphene as the source, drain and gate electrodes. All of these constituent materials are single crystals held together by van der Waals bonding.

2D FET

Figure 1: The FET is built from all 2D material components.

The van der Waals bonding interfacing presents a unique device architecture where crystalline, layered materials with atomically uniform thicknesses, are stacked on demand without the lattice parameter constraints.

New class of devices

"Our work represents an important stepping stone towards the realisation of a new class of electronic devices in which interfaces based on van der Waals interactions rather than covalent bonding provide an unprecedented degree of control in material engineering and device exploration," Javey said. "The results demonstrate the promise of using an all-layered material system for future electronic applications."

The resulting transistor exhibits n-type behaviour with an ON/OFF current ratio of >106, and an electron mobility of 33 cm2/V•s. The mobility does not degrade at high gate voltages, presenting an important advantage over conventional Si transistors where enhanced surface roughness scattering severely reduces carrier mobilities at high gate-fields.

Roy and Javey

Figure 2: Tania Roy and Ali Javey fabricated a 2D field-effect transistor that provides high electron mobility even under high voltages and scaled to a monolayer in thickness. Source: Roy Kaltschmidt, Berkeley Lab

"In constructing our 2D FETs so that each component is made from layered materials with van der Waals interfaces, we provide a unique device structure in which the thickness of each component is well-defined without any surface roughness, not even at the atomic level," Javey says. "The van der Waals bonding of the interfaces and the use of a multi-step transfer process present a platform for making complex devices based on crystalline layers without the constraints of lattice parameters that often limit the growth and performance of conventional heterojunction materials."

This research was funded by the U.S. Department of Energy's Office of Science. Javey is the corresponding author of a paper describing this research in ACS Nano titled "Field-Effect Transistors Built from All Two-Dimensional Material Components". Co-authors are Tania Roy, Mahmut Tosun, Jeong Seuk Kang, Angada Sachid, Sujay Desai, Mark Hettick and Chenming Hu.





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