IP Accelerated speeds up IP integration with SoCs
Synopsys, Inc. has launched the IP Accelerated initiative to help designers reduce the time and effort of integrating IP into their SoCs. This initiative features the addition of IP Prototyping Kits, IP Virtual Development Kits, and customised IP sub-systems.
The IP Accelerated initiative goes beyond the traditional IP supplier paradigm, delivering solutions that ease IP configuration and integration into the overall SoC as well as accelerate their software development effort.
The DesignWare IP Prototyping Kits build on proven reference designs that enable designers to start implementing the IP in an SoC context in minutes. The kits provide the essential hardware and software elements needed to reduce IP prototyping and integration effort, including the HAPS-DX FPGA-based prototyping system with pre-configured IP and SoC integration logic, a PHY daughter board, simulation testbench and a DesignWare ARC processor-based 32bit software development platform running Linux, reference drivers, and application examples.
Designers can modify the standard IP configuration for their target application through an iteration flow consisting of the coreConsultant IP configuration tool, the ProtoCompiler synthesis and debug tool, and compilation scripts. Source: Synopsys
The DesignWare IP Virtual Development Kits, on the other hand, are SDKs consisting of a reference virtual prototype, which includes a model of a multi-core ARM Cortex-A57 Versatile Express board and a configurable model of the DesignWare IP. These kits run Linaro Linux, and come with reference drivers for the DesignWare IP, as well as provide non-intrusive debug control and visibility.
Software developers can use either the virtual development kits or prototyping kits for early software development, bring-up, debug and test concurrently with SoC development. Both kits easily plug into existing software tool chains, and interface seamlessly with the most popular embedded software debuggers, providing system-wide debug and analysis capabilities.
Finally, Synopsys experts can assist designers in customising the DesignWare IP for their specific application requirements and integrating the IP into their SoC. Companies can leverage Synopsys' IP expertise to obtain pre-validated, fully integrated sub-systems, allowing designers to then focus on differentiating their SoC rather than developing or integrating standards-based IP.
The DesignWare IP Prototyping Kits and IP Virtual Development Kits for select DesignWare IP are scheduled to be available in July.
The non-intrusive debug control and visibility provided by the IP VDK ease software bring-up. Source: Synopsys