Breker gains Synopsys' VIA membership
Breker Verification Systems has become a member of Synopsys Inc.'s Verdi Interoperable Apps (VIA) Access Program—a move that will enable the interoperability between Breker's TrekSoC and Synopsys' automated, open debug system.
The VIA Access Program provides qualified access to VIA API to enable interoperability in support of verification and design flows. The program includes license to distribute the Synopsys FSDB Writer binaries as part of member's tool. SoC teams and third-party EDA vendors can use the Verdi platform to develop innovative debug capabilities.
Verdi incorporates all of the technology and capabilities expected in a debug system. In addition, the system combines advanced debugging features with support for a broad range of languages and methodologies. Source: Synopsys
Breker, as a VIA member, will integrate its TrekSoC family of software to generate self-verifying C test cases to run on embedded processors with Verdi. The integration will allow users to move seamlessly between TrekSoC's GUI and the Verdi environment, to further ease verification debug on SoC designs.
These test cases are generated from graph?based scenario models that capture intended system behaviour. TrekSoC's TrekBox run-time component provides a GUI for verification engineers to visualise generated C code and test case maps. The integration will assist smooth debug when a test case fails and the design's register transfer level (RTL) code, testbench components, and the C test case generated by TrekSoC need to be examined simultaneously.
TrekSoC takes as input a hierarchy of scenario models. Lower-level models provide randomised services to higher-level models, and higher-level models may apply constraints on lower-level models to control randomisation of the provided services. Source: Breker Verification Systems
Breker will demonstrate the link between TrekSoC and Verdi during the 51st Design Automation Conference (DAC) next week.
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