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POET integrates electronic, optical elements in one chip

Posted: 08 May 2014  Print Version  Bookmark and Share

Keywords:Moore's Law  semiconductor  CMOS 

POET Technologies is stepping forward with a technology, one that has been in the making for more than two decades, which spells hope for Moore's Law,

Derived from "Planar Opto-Electronic Technology," the company's name describes its own process, which uses gallium arsenide (GaAs) to build electrical, optical, and electro-optical integrated circuits. It is the result of research spearheaded by Geoffrey Taylor, the company's chief scientist, who has been directing its development and is concurrently a professor of electrical engineering and photonics at the University of Connecticut, where the company houses its research and development facilities.

POET's Geoffrey Taylor

Taylor: POET’s benefits are like those of the first ICs—it eliminates numerous parts and processes, while decreasing size, cost, complexity and power.

Taylor's three decades of experience in design and development in electronic and optical device physics, circuit design, and opto-electronic technology, materials, and applications has been critical to the development of the POET platform. As part of a presentation to EE Times, the company outlined the heart of POET Platform—a patented materials system that supports monolithic fabrication of integrated circuits containing active and passive optical performance analogue and digital elements.

The full POET process also includes a "Planar Electronic Technology" electrical subset that can support CMOS, Bi-CMOS, and bipolar device fabrication, and offers cheaper, simpler process and fabrication options for applications that don't require optical.

Semiconductor performance has historically improved at a logarithmic rate because transistors have shrunk in size, allowing more transistors to be packed into a semiconductor chip, notes Taylor. Moore's Law established the idea that the number of transistors in a chip doubles every 1.5 to 2 years, thus increasing capabilities of electronic equipment, but the challenge is that as transistors become smaller, the cost of reducing size while increasing speed becomes more expensive, and eventually uneconomical.


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