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Silego powers up mixed-signal matrix in smaller footprint

Posted: 02 May 2014  Print Version  Bookmark and Share

Keywords:Silego  mixed-signal  GPAK3 

Silego has scaled down shrunk its programmable mixed-signal matrix, the SLG46110V, enabling further reduction in power consumption, board space, and routing complexity.

In early 2013, Silego introduced the first of its GreenPAK3 (GPAK3) mixed-signal FPGAs. As I said at that time:

The way I think of GPAK chips is as super-small mixed-signal FPGAs that you can design and programme in just a few minutes and that cost just a few cents each.

Well, Silego has just announced the latest incarnation of the GPAK3 family—the SLG46110V—which boasts a programmable mixed-signal matrix that can accommodate power supplies ranging from 1.8V to 5.5V. These devices contain two ACMPs, four LUTs (lookup tables), six combination function macrocells, and a number of other counter/delay/flip-flop macrocells.

Silego SLG46110V

The SLG46110V is presented in a tiny 1.6mmx1.6mmx0.55mm, 8-GPIO STQFN package.

A single GPAK mixed-signal FPGA can replace a variety of primitive logic, comparators, and passive components, thereby saving cost, power, and PCB real estate.

Like other devices in the GPAK family, designers using SLG46110V components can take advantage of an easy-to-use hardware development kit and associated GPAK Designer graphical user interface (GUI). This allows designers to quickly and easily prototype designs and then make changes as required.

If you want more information about pricing, samples, datasheets, and the functions and features offered by these devices—along with more information about the GPAK Designer software and hardware development kits—feel free to visit their website.

- Max Maxfield
  EE Times





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