Powering image sensors in automotive camera apps
Advanced driver assistance system
For example, a popular 1.2 megapixel sensor for automotive advanced driver assistance systems (ADAS) and surround view/parking assist camera applications with a high dynamic range and 720p60 capability is the Aptina AR0132. It requires 1.8V for the core (VDD) and I/O section (VDD_IO), and 2.8V for the analogue section (VAA, VAA_PIX, and VDD_PLL). It is intuitive that the chip's analogue section is more susceptible to noise on its supply line. Many designs utilise low-dropout regulators (LDOs) for all power rails down-converted from a 5V input rail.
The overall objective is to provide a practical power system implementation for the AR0132AT image sensor that allows successful integration into an automotive application and form factor. And while the details of other sensors and systems may differ, the principles discussed here will be generally applicable.
Size is important because it must fit into a 25mm cube, which automatically places a heavy emphasis on overall efficiency and good thermal management. Although LDOs have low noise output, they are not ideal to work in a 25mm cube due to high power losses and resultant unwanted heating of the image sensor.
A switching power supply solution has much lower power dissipation, but intrinsically higher output ripple and noise. Image sensor noise (ripple) sensitivity on its analogue input power supply rails requires additional care when implementing a switching power supply solution.
In order to design a power system that efficiently powers the image sensor, it is necessary to know the sensor sensitivity levels and the ripple output of the switching power supply, and to take design steps to reduce ripple at the sensor power rail to below the degradation threshold.
Image sensor noise threshold measurement
The simple circuit in figure 1 was employed to determine noise thresholds, if any, for every sensor supply rail.
Figure 1: Noise threshold test circuit.
Generator frequency was swept from 50kHz to 5MHz while observing image quality via Aptina Devware development software running on a laptop PC. For sensitive rails, signal size was halved repeatedly until visual artifacts were no longer present.
Part selection considerations
Since the overall power requirement is very low (0.28W for digital core/I/O and 0.42W for the analogue section), it is important to choose a power conversion IC with excellent efficiency at low output currents while operating at a nominal input voltage of 13.5V. These considerations lead to the selection of constant on-time (COT) architecture. COT architecture is ideal for applications requiring good efficiency at light loads and only requires minimal external capacitance for good load transient response. Achieving good efficiency at light loads comes with the trade-off of increased output ripple, similar to pulse-frequency modulation (PFM) mode schemes. COT architecture helps on two fronts: efficiency/thermal management and solution size.
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