28nm test validates 50% power savings on SRAM
The test demonstrated that the IP company's patented circuit architecture delivers more than 50 per cent energy savings compared with industry standard SRAMs. The memory was designed through a combination of detailed circuit analysis, architectural improvements, and the use of advanced statistical models.
The company's SRAM architecture is technology independent and is applicable to bulk CMOS, FinFET and FD-SOI technologies.
SureCore's Chairman and industry veteran, Guillaume d'Eyssautier commented: "These early evaluation results are excellent and show that this approach delivers game-changing power performance for emerging low power applications such as the Internet-of-Things. This performance could double battery life in power critical applications and brings the 'fit-and-forget' approach to distributed sensor networks a crucial step closer."
SureCore plans to target the technology, and its energy efficiency benefits, at the mobile, networking and wearable technology markets, where power is a critical factor.
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