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ARM, SMIC expands partnership for high-performance SoC designs

Posted: 12 Feb 2014  Print Version  Bookmark and Share

Keywords:ARM  SMIC  SoC design  mobile  28nm 

ARM and SMIC, which claims to be China's largest and most advanced semiconductor foundry, have revealed a partnership to offer the ARM Artisan physical IP platform for SMIC's 28nm poly SiON (PS) process. The deal seeks to provide high-performance, high-density and low-power technologies for SoC designs.

Under the agreement, ARM will provide a comprehensive physical IP platform for advanced process technology that supports a wide range of consumer applications targeting the fast-growing smartphone, tablet, wireless and digital home markets.

"SMIC is pleased to offer access to the popular ARM Artisan standard cells and next-generation memory compilers," said Tianshen Tang, SVP of SMIC's design service center. "Strengthening our collaboration with ARM enables optimized implementation of cost- and power-sensitive SoCs for our customers."

"ARM Artisan standard cells and memory compilers deliver the features, quality and rigorous silicon validation that customers demand to achieve fast time-to-market," said Dipesh Patel, EVP and GM, physical design group, ARM. "Extending our collaboration with SMIC on the 28nm PS process demonstrates ARM's commitment to provide the best SoC implementations at leading foundries."

The ARM Artisan physical IP platform for SMIC's 28nm poly SiON (PS) process provides the building blocks to implement a range of performance and area optimized, low-power SoCs designs. ARM's silicon-proven IP platform offers a comprehensive set of memory compilers, standard cells and logic, and general-purpose interface products that meet the most demanding performance and power requirements for mobile communications and computing.

ARM's standard cell libraries and memory compilers incorporate multi-channel and mixed Vtfeatures to enable a wide performance and power spectrum taking advantage of the performance and power range of SMIC's leading-edge poly SiON process. These features ensure that power budgets for performance-critical SoC designs can be met.





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