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Imec modelling tool estimates cost of chip technology nodes

Posted: 16 Jan 2014  Print Version  Bookmark and Share

Keywords:nanoelectronics  cost modelling  semiconductor  patterning 

Imec and AlixPartners have entered a partnership to work on a cost modelling solution that will help assess the cost of advanced semiconductor technology options. The companies said they plan to raise the operational intelligence associated with the costs of future technology nodes. The modelling solution will be designed to assess the cost of various patterning options for N10/N7 nodes, advanced packaging solutions, and 3D NAND memory.

Imec and AlixPartners will be comparing the 'should-be' cost of lithography-patterning from a system perspective and will assist in providing this information to industry suppliers and materials providers to better provision the development of extreme ultraviolet (EUV) lithography and/or 193inm multi-patterning lithography solutions. This model, designed to address advanced patterning costs, will also be crucial for fabless semiconductor companies (those that outsource their manufacturing) that are defining product strategy in close collaboration with foundries.

Economics today are challenging Moore's law as the costs associated with node progression have been rising significantly. Below the 28nm node, the semiconductor industry is struggling to maintain its historical 30-per cent cost savings per logic gate node over node. At the same time, consumer markets today are demanding cheaper smartphones and other devices, including for the Internet of Things (IoT).

"More than ever, decisions on future technologies must be driven by economics, and this collaborative effort is designed to be a giant step towards providing granular visibility into the costs that drive the semiconductor ecosystem. With this visibility, industry leaders will have the decision support needed to make smart choices on breakthrough technologies, with their available resources," said Nord Samuelson, managing director at AlixPartners and leader of the firm's North American High Technology and Semiconductor Practice.

As part of this joint effort, Imec and AlixPartners will also work with interested parties who have new ideas on how to reduce semiconductor design, development, and manufacturing costs, thereby assisting with the building of corresponding cost models via Imec's existing Industrial Affiliation Programme (IIAP).

An Steegen, Senior Vice President of Process Technologies at Imec, said: "Over the last years, we have been pushed by our partners to find new ways to revive Moore's law from a cost perspective and identify new technologies that can significantly reduce processing cost. We are excited about our collaboration with AlixPartners as it will help us to precisely quantify and compare the cost of different options considered -and in this way prioritise our R&D efforts- and assist in strategising a product's roadmap."





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