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JEDEC rolls DDR4 update prior to general adoption

Posted: 07 Jan 2014  Print Version  Bookmark and Share

Keywords:DDR4  JEDEC  Samsung  SK Hynix  desktop 

Samsung and SK Hynix have begun manufacturing their first DDR4 chips in early 2011, prior to the release of the JEDEC DDR4 DRAM standard in September 2012. Micron-owned memory maker Crucial, for example, initially announced plans to sell DDR4 as early as December, but now commercial availability of its new DDR4 modules is not expected until the spring.

While Samsung began volume production of DDR4 at the end of the summer, at that time there was nowhere for the modules to go. Although DDR4 will eventually be used in devices that have used DDR3, you can't simply plug DDR4 into a DDR3 slot. Commercial adoption of DDR4 devices is hampered by the lack of memory controllers to support them. DDR4 will likely enter the server market next year, with broader adoption by the desktop, notebook and consumer electronics markets closer to 2015.

Despite the slow debut of DDR4, margins and profitability have been up for DRAM makers of late after six consecutive quarters of decline, IHS iSuppli memory analyst Dee Robinson wrote recently, in part because the DRAM business has changed dramatically in the past two years with industry consolidation leaving three major players in the market.

Since the release of the DDR4 DRAM standard, JEDEC's JC-42 Committee for Solid State Memories is preparing an update but has no set release date, committee member Scott Schaefer told me during a recent conference call with other JEDEC representatives. A great deal of time has been spent over the past year clarifying details of the specifications and fine-tuning the new features.

"A lot of features interact with each other," he said. The initial DDR4 DRAM standard was targeted at early adopters, doubling the speed as well as improving performance scalability, capacity, and power efficiency in comparison to its predecessor.

"Going forward, the features are pretty much set, and we'll do a little more fine-turning as well as add a few more speed bands," noted Schaefer. What ultimately decides whether there is a new specification rather than a revision is voltage supply and speed. "If we're adding a feature, but not changing the voltage or the speed performance, then it will probably be an addendum to the spec." However, changes to the form factor in support of better speeds or lowering voltage is seen as a new technology. In order to make the jump to DDR5, it would require major new features, a lower power supply and changes to the form factor.

Dan Skinner, director of architecture development at Micron Technology and committee member, said ultimately the market decides what it wants to use based on a variety of price/performance criteria. The work-in-progress LPDDR4 Low Power Memory Device Standard specification came into being to meet the demands of devices such as smartphones and tablets that are particularly conscious of power consumption and battery life, he says. The DDR4 DRAM standard is aimed at a broader set of applications including servers, laptops, desktop PCs and consumer products.

Performance is still the most critical to end users, stated Skinner, because it has the most impact on their experience with a device, affecting things such as application response times, screen resolution, and video playback.

For now, JEDEC is focused on the update to the DDR4 standard, but there are other initiatives at work to evolve DRAM. One example is Hybrid Memory Cube (HMC), a technology that involves 3D stacking of DRAM and placing the memory closer to the CPU. The Hybrid Memory Cube Consortium released the final version of the initial HMC interface specification in the spring of 2013.

- Gary Hilson
  EE Times





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