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Advantages of low latency networks

Posted: 26 Nov 2013  Print Version  Bookmark and Share

Keywords:FPGA  ASICs  interface IC  low latency  networks 

In one LinkedIn discussion on a major FPGA Group, it was noted that low latency networks—the big FPGA-based innovation that is sweeping the financial trading industry—is pretty much limited to that industry. For example, consider an article that appeared on the Network Computing Website: Arista Outpaces Cisco Again With FPGA Switch.

In reality, however, there are many other players carving out a niche with low-latency, high-throughput networks and networked devices. Some of these take a very serious side, like the AFDX and ARINC 664 networks driving the avionics systems in the Airbus A380 and the Boeing 787 Dreamliner, among others. These networks improve reliability and save weight, while the low latency and high throughput hardware in the FPGAs and ASICs that run the lowest layers of the links help guarantee that all the date arrives in a safe and timely manner. Similar networks are employed in the rail and marine industries.

Additional applications include feedback and links for vibration control and motion control through a variety of custom and commercial protocols. And many other applications involve making the standard Internet faster, and less laggy for tasks such as video conferencing and telemedicine (the use of telecommunication and information technologies to provide clinical health care at a distance).

Network security is another area for which low latency and high performance is important – thereby facilitating the ability to react to threats faster than those threats can propagate through the mainstream network.

What goes into a low latency network device? First, the wires or optics must enter via a connector. This must then be routed to the physical interface IC, which then translates the analogue signals into a digital waveform for use with the FPGA. In a low-latency design, the FPGA then performs similar processing to a conventional MAC, but it may include hardware layers above the conventional MAC layers, such as everything required to send the CPU a fully-formed UDP data set. The FPGA might not store packets out in the main system RAM right away, but rather sort packets into a fast on-board RAM. The FPGA may also perform filtering on packets so that any high-priority packets are handled first by the CPU. This is usually bound with a custom driver for the operating system (OS) that gives priority to these packets. A developer can then use this driver to build an application that responds to these packets much faster than normal.

The difference between a standard system and a low latency network can be very significant. Consider an application like Ping being run on a standard system. In this case we might expect to see something like the one shown in figure 1.

Figure 1: Running Ping on a standard network.


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