ASIC loses steam, FPGAs add comms cores
Xilinx has recently rolled out its portfolio of cores which target wired, wireless and data center systems. The company's SmartCore offering of about 75 comms-specific cores is a collection of intellectual property acquired or developed in house over the last two years.
Archrival Altera said it has at least 75 comms cores in its portfolio as well. Both companies say comms equipment makers are designing fewer ASICs on average and adopting more FPGAs.
International Data Corp reported total ASIC starts declined to 2,313 in 2011, down six percent from 2002 levels. In wired comms, the decline was nearly twice as steep to 442 ASICs in 2011, down 11 percent from 2002.
Xilinx claims it has seen less than 50 ASIC starts among the top the comms OEMs this year, less than 20 of them at the 28-nm node. Vendors need system revenues of $400 million or more to justify 28-nm ASICs, said Robert Bielby, senior director of strategic marketing and business planning at Xilinx.
In a study provided by Altera, one market researcher estimated the costs of developing a new 28-nm ASIC at more than $80 and a 20-nm device at nearly $160 million. "The mind shift we have seen is they used to have to justify FPGAs, but now they have to justify ASICs," Bielby said.
Despite the figures, a Cisco chip executive said recently that Cisco is investing about as much as ever in its ASIC teams. In addition, Huawei's silicon design division, HiSilicon, has become China's largest fabless chip design house.
In a quarterly earnings call last year, Altera announced it lost two FPGA design wins to ASICs, at least one of them believed to be at Huawei. One analyst estimated Huawei designed 35 ASICs in 2012 up, from 24 the previous year.
FPGAs have a strong presence in high-end, relatively low-volume markets such as core optical networks, said Jag Bolaria, senior analyst at the Linley group. They have also done well in traditional cellular base stations, "but as the market shifts to small cell base stations, customers want a single full integrated device and this will squeeze out FPGAs," he said.
- Rick Merritt
|Related Articles||Editor's Choice|